Method for updating data from a cache address location to main m

Details Method for updating data from a cache address location to main m Method for updating data from a cache address location to main m

1989-01-19

1993-08-31

Lee, Thomas C.

Boots, shoes, and leggings

364DIG1, 3642612, G06F 1208

Patent

active

052416399

ABSTRACT:
Disclosed is a method for operating a cache memory. In response to a write transaction, data is written to a location in a foreground memory that is part of the cache. A modified bit is set in the foreground memory indicating that the data must be written back to main memory. A registration bit is checked in the foreground memory location to determine whether the address is registered. The location of the foreground memory is written to a registration memory in the cache if the registration bit is not set. The registration bit is set in the foreground memory, in conjunction with writing the address of the memory location to the registration memory, to indicate that the address has been registered. In response to a subsequent transaction, the foreground memory location can be selected to store new required data. The modified bit is checked to determine whether the data stored in the foreground memory location must be written back to main memory before the location can be used to store the new data. The data stored in the foreground memory location is written back to the main memory if the modified bit is set. The foreground memory location is filled with the new data while the cache address of the new data and the previous state of the registration bit are retained in the registration memory. The modified bit is cleared in conjunction with filling the foreground memory location with the new data.

REFERENCES:
patent: 3878513 (1975-04-01), Werner
patent: 4074254 (1978-02-01), Belser et al.
patent: 4322815 (1982-03-01), Broughton
patent: 4654819 (1987-03-01), Stiffler et al.
patent: 4890226 (1989-12-01), Ztoh
patent: 4916603 (1990-04-01), Ryan et al.

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