Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Electrical signal parameter measurement system
Reexamination Certificate
2000-10-05
2003-07-15
Hoff, Marc S. (Department: 2857)
Data processing: measuring, calibrating, or testing
Measurement system in a specific environment
Electrical signal parameter measurement system
C702S065000, C702S117000, C702S189000, C324S600000, C324S629000, C324S649000, C324S658000, C716S030000, C716S030000
Reexamination Certificate
active
06594594
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the field of high frequency small signal analysis and more specifically to a modeling method for extracting a single set of equivalent circuit model parameters that specifically simulate measured S-parameters, but are also useful in the development of non-linear Field Effect Transistor (FET) models, and analysis of the physical structure of the FET.
BACKGROUND OF THE INVENTION
There is a need for a high-frequency nonlinear FET modeling algorithm that will produce a unique solution from measured S-parameters. The problem relates to the difficulty in uniquely determining the feedback impedance of a Field Effect Transistor (FET). Present modeling techniques generate non-unique models for fitted S-parameters or require multiple measurements at different bias points (i.e., cold FET measurements) to satisfy uniqueness. Both of these modeling strategies present problems for nonlinear FET modeling. Non-unique models consist of parameters that are not physically consistent with the FETs fabrication parameters, such as layout dimensions and material parameters. In addition, the cold-FET based model extraction methods do not express the bias-dependence of parasitic elements correctly.
Another disadvantage of prior art equivalent circuit model techniques is that they assume that the parasitic components are constant with bias when they almost certainly are not. This assumption leads to inaccuracies in the extraction of the intrinsic equivalent circuit. The precise determination of the parasitic, especially the resistive, components directly determines the accuracy of the extraction because the calculated values of the intrinsic components depend on them. In particular, the accurate extraction of feedback resistance in a FET is critical to determining the accurate values for all other components.
While most direct extraction techniques rely on cold FET measurements to determine values for the parasitic components, optimization based techniques often use over-dimensioned sets of multi-bias S-parameter (and noise response) delete measurements. In either case, the resistive value of the parasitic components are kept constant even though they can be highly bias-dependent. Because of this, the results of direct extraction based on cold FET parasitics suffer from inaccuracies as bias changes. Although optimized extractions may be attempted to compensate for the parasitic bias dependence, they cannot provide a unique solution to the equivalent circuit because the feedback impedance cannot be uniquely determined with conventional optimization algorithms. This uncertainty often leads to results that are not physically significant, even though they may be accurate for fitting measured S-parameters.
Thus, there is a need for a modeling method that can extract an accurate and unique model solution to a single set of measured S-parameters to develop nonlinear FET models that are both accurate and physically significant.
SUMMARY OF THE INVENTION
The present invention provides a FET modeling algorithm that generates a unique solution for FET feedback impedance, thus determining resistive, capacitive, and inductive equivalent circuit parameter values based on a single set of S-parameter measured values. The subsequent extracted circuit model is a unique global solution rather than a non-unique local minima. In addition, the extracted values satisfy self-consistent checks such as scaling with FET device periphery, expected bias-dependence, and convergence to known fabrication parameters such as gate metalization resistance, material sheet resistance, gate length and recess dimensions.
Disclosed in one embodiment is a method of uniquely determining the feedback impedance values for a FET device. The method includes the step of competitive extraction where multiple trial solutions are attempted spanning a region or “space” of feedback impedance values. Each solution in the competitive extraction can be achieved by utilizing the same cycle of conventional direct extraction via Minasian extraction. Next, the extraction step is followed by an optimization step that reduces the extracted values to a model that better fits measured S-parameters. This optimization step can be achieved by conventional optimization algorithms. Last, selection of the most accurate and unique trial solution can be achieved by further evaluating the speed of convergences in an error metric.
Also disclosed is a method for unique determination of FET equivalent circuit parameter values, the method comprising the steps of selecting a feedback impedance value from a space of expected parameter values and generating a FET equivalent circuit model. The method further includes the step of establishing those parameter values for the circuit model that converge fastest so that a sufficiently low error fit between the expected S-parameters and the measured S-parameter is obtained, the convergence obtained using multiple Minasian extraction and optimization cycles.
A technical advantage of the invention is that by tracking the speed of convergence, the solutions surrounding unique, physically significant models condense faster than the rest. Conventional techniques stop once some least-squares based error metric is minimized.
Another technical advantage of the invention, is the development of unique models that best represents the physical structure of a FET. This has been proven through extensive verification and testing.
REFERENCES:
Wurtz, GaAsFET and HMET Small-Signal Parameter Extraction from Measrued S-Parameters, Aug. 1994, IEEE, vol. 43, pp. 655-658.*
Sommer, A New Method to Determine the Source Resistance of FET from Measured S-Parameters Under Active-Bias conditions, Mar. 1995, IEEE, vol. 43, pp. 504-510.
Desta Elias
Hoff Marc S.
Northrop Grumman Corporation
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