Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Insulative housing or support
Reexamination Certificate
1999-10-29
2001-07-03
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Insulative housing or support
C438S126000
Reexamination Certificate
active
06255142
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to liquid dispensing methods and apparatus used in semiconductor package manufacturing and, more particularly, to a method and apparatus for underfilling a semiconductor device mounted to a substrate.
BACKGROUND OF THE INVENTION
Manufacturers of semiconductor chip packages are constantly striving to develop smaller chip packages with enhanced capabilities. For example, flip chip technology has developed as a result of the movement toward ever increasing miniaturization of electronic circuitry. This technology is also known as direct chip attach or “DCA”. It includes “flip chip” bonding, wherein a flip chip integrated circuit (IC) is electrically and mechanically connected to a substrate through solder balls on the underside of the flip chip that are registered or aligned with solder pads on the substrate.
Generally referring to
FIGS. 1-3
, it is well known that a semiconductor die or flip chip
10
is provided with a pattern of solder bumps or balls
12
on an underside or circuit side thereof. The solder balls
12
are registered or aligned with solder pads
14
on a PC board or similar substrate
16
. The underside of the chip
10
is also referred to as the image side of the chip. Flux (not shown) is normally supplied between the solder balls
12
and solder pads
14
. Upon heating, the solder pads
14
on the PC board or substrate
16
reflow and physically connect with the solder balls
12
on the underside of the chip
10
. The solder balls
12
typically have a high melting point and therefore do not reflow. This connection is illustrated diagrammatically in
FIG. 2
by deformed solder pad
14
′ mating with a solder ball
12
. This process eliminates the requirement for wire bonding.
Special liquid epoxy
18
(
FIG. 3
) is typically used to completely fill the underside of the chip. This is referred to herein as the “underfill” operation. Upon curing, the resulting encapsulation forms a non-hygroscopic barrier to prevent moisture from contacting and thus corroding the electrical interconnects between the PC board
16
and the chip
10
. The epoxy
18
also serves to protect the bonds between the deformed solder pads
14
′ and the solder balls
12
by providing thermal stress relief, i.e., accommodating different rates of thermal expansion and contraction.
Referring to
FIG. 3
of the drawings, once the underfill operation is complete, it is desirable that enough liquid epoxy be deposited along the edges of the chip
10
to fully encapsulate all of the electrical interconnections and so that a fillet
18
a
is formed along the side edges of the chip
10
. Normally, the liquid epoxy flows under the chip
10
as a result of capillary action due to the small gap between the underside of the chip
10
and the upper surface of the PC board or substrate
16
. As the surface area of the chip
10
increases and/or the gap
15
between the chip
10
and the substrate
16
becomes smaller, it becomes more difficult and time consuming to fully encapsulate all of the electrical interconnections. This may result in incomplete underfill wherein voids
20
in the gap
15
may exist. If such voids are present, then corrosion and undesirable thermal stresses may result which may result in deceased performance or early failures.
It would therefore be desirable to provide a manner of underfilling the gap formed between a flip chip and a substrate, and especially in applications involving larger flip chip geometries and smaller gaps, while preventing any voids or spaces left unfilled between the flip chip and the substrate.
SUMMARY OF THE INVENTION
The present invention overcomes the foregoing and other shortcomings and drawbacks of underfill apparatus and methods heretofore known. While the invention will be described in connection with certain embodiments, it will be understood that the invention is not limited to these embodiments. On the contrary, the invention includes all alternatives, modifications and equivalents as may be included within the spirit and scope of the present invention.
Generally, the invention relates to a method and apparatus for underfilling a gap between a multi-sided semiconductor device and a substrate to encapsulate a plurality of electrical connections formed therebetween. The semiconductor device may comprise a flip chip package having a flip chip mounted to a substrate with a plurality of electrical connections formed in the gap between opposed surfaces of the flip chip and the substrate. According to the method of the present invention, a seal is formed between the semiconductor device and the substrate to seal the gap along multiple sides of the device, while the gap is left unsealed along at least one side of the device to permit fluid communication with the gap. Viscous underfill material is dispensed as an elongated bead adjacent the one side of the semiconductor device along which the gap is unsealed. Thereafter, a pressure differential is created across the elongated bead of underfill material to draw the underfill material into the gap and thereby encapsulate the electrical interconnections formed therebetween. The underfill material may then be cured after the electrical interconnections have been fully encapsulated.
In one aspect of the invention, a fixture member is provided having a top wall and a plurality of side walls depending from the top wall to define a device receiving chamber. The semiconductor device is received within the device receiving chamber so that the top wall and side walls of the fixture member form a seal between the device and the substrate to seal the gap along multiple sides of the device, while the gap is left unsealed along at least one side of the device to permit fluid communication with the gap. A negative pressure source is connected to the device receiving chamber adjacent one of the sides of the device along which the gap is sealed that is opposite to the at least one side of the device along which the gap is unsealed. The negative pressure source creates at least a partial vacuum in the device receiving chamber to draw the viscous underfill material into the gap and thereby encapsulate the semiconductor device package.
In another aspect of the present invention, a fluid detecting sensor is provided that communicates with the device receiving chamber. The fluid detecting sensor, such as an infrared sensor, is operable to detect the presence of the liquid encapsulant material as it extends beyond the one side of the device that is opposite to the at least one side of the device along which the gap is unsealed. When the liquid encapsulant material is detected by the infrared sensor, the application of negative pressure to the device receiving chamber is terminated, and the device receiving chamber is then vented to atmosphere. In this way, the gap formed between the multi-sided semiconductor device and the substrate is fully underfilled with the liquid encapsulant material to encapsulate the plurality of electrical interconnections formed between the device and the substrate.
From the foregoing summary and the detailed description to follow, it will be understood that the invention provides a unique and effective method and apparatus for underfilling semiconductor devices such as flip chips. The invention is particularly advantageous in flip chip applications in which very small gaps are formed between the flip chip and the substrate or in applications utilizing relatively large flip chips having a large space to underfill. In these situations, the capillary action normally relied upon to move the underfill material into the gap may not be enough to fully encapsulate the electrical connections, and the at least partial vacuum created in device receiving chamber ensures full encapsulation of the semiconductor device package.
The above and other objects and advantages of the present invention shall be made apparent from the accompanying drawings and the description thereof.
REFERENCES:
patent: 4049244 (1977-09-01), Hedrich
patent: 4279360 (1
Babiarz Alec J.
Bouras Carlos Edward
Cursi Drusilla Bertone
Lewis Alan Ray
Vint Jason Thomas
Nelms David
Nhu David
Nordson Corporation
Wood Herron & Evans LLP
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