Static information storage and retrieval – Floating gate – Particular biasing
Patent
1998-08-12
2000-04-18
Nelms, David
Static information storage and retrieval
Floating gate
Particular biasing
36518521, 3651853, G11C 1604
Patent
active
060523107
ABSTRACT:
A flash Electrically-Erasable Programmable Read-Only Memory includes a plurality of field effect transistor memory cells each having a source, drain, floating gate and control gate. The state of erasure of the cells is determined by sensing the source voltage of the cells. An erase pulse is applied to the cells by a power supply which applies a source pull-up voltage to the cells configured in accordance with a predetermined function of the state of erasure. The power supply includes a variable current source and/or a resistor which are continuously adjusted as the erase operation progresses to provide an optimal vertical field across the tunnel oxide layers of the cells. Alternatively, the power supply can include a voltage regulator which is continuously adjusted to directly apply an optimal source voltage to the cells. The state of erasure can also be predetermined as a function of time or applied erase pulses, and the power supply adjusted in an open loop manner. The state of erasure of the memory is preferably monitored by applying alternating erase and monitoring pulses to the cells. The source voltage is sensed during the monitoring pulses to provide an accurate indication of the erase state. The source current drive during the monitoring pulses is sufficiently reduced from the current drive during the erase pulses that the source voltage will not clamp to the main source supply voltage, thereby providing a correlation between the source voltage and erase state.
REFERENCES:
patent: 5508959 (1996-04-01), Lee et al.
patent: 5546340 (1996-08-01), Hu et al.
patent: 5642311 (1997-06-01), Cleveland et al.
patent: 5844847 (1998-12-01), Kobatake
patent: 5901090 (1999-05-01), Haddad et al.
Advanced Micro Devices
Alexander David G.
Nelms David
Nguyen Tuan T.
LandOfFree
Method for tightening erase threshold voltage distribution in fl does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for tightening erase threshold voltage distribution in fl, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for tightening erase threshold voltage distribution in fl will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2341610