Fishing – trapping – and vermin destroying
Patent
1989-01-10
1990-12-18
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437226, 437245, 437974, 148DIG28, 148DIG135, 156643, 156656, H01L 2102
Patent
active
049786393
ABSTRACT:
Metallized via-holes and a wraparound metal plating are simultaneously formed on semiconductor chips by patterning a photoresist mask on the front surface of the wafer to open windows over metal pads as well as the grid areas where wraparound plating is desired; etching off the exposed metal if necessary and forming via-holes and grooves in the wafer by reactive ion etching to a depth which is less than the total thickness of the wafer; depositing a thin conductive film along the walls of the grooves and via-holes by electroless methods; plating the walls of the grooves and the via-holes with conductive metal by electrolytic methods; removing the back surface of the wafer ("backlapping") along with the floors of both the grooves and the via-holes, to expose the metal on the wall of the via-holes and separate the individual chips; and, depositing conductive metal on the back surface of the individual chips to complete the grounding path.
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Chan Simon S.
Day Ding-Yuan S.
Hua Chang-Hwang
Lee Adrian C.
Avantek, Inc.
Hearn Brian E.
Nguyen Tuan
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