Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Patent
1979-06-15
1980-12-16
Newsome, John H.
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
346158, 346161, 427249, 427250, 430296, 430298, 430315, B05D 306
Patent
active
042397880
ABSTRACT:
A process for forming a delineated vapor deposition film of a deposition material on a substrate. The delineation is accomplished by exposing selected areas of the substrate to an electron beam before depositing the deposition material whereby the sticking coefficients of the selected areas are sufficiently reduced so as to prevent any significant deposition in those areas. Furthermore, irradiated areas of the substrate can be restored to their original surface characteristics by exposure to a second electron beam while the substrate is at an elevated temperature. Thus, areas of the substrate can be negatively delineated to prevent deposition, and such negatively delineated surfaces can then be positively delineated to permit deposition.
REFERENCES:
patent: 3333984 (1967-08-01), Kaspaul et al.
patent: 3462762 (1969-08-01), Kaspaul et al.
patent: 3485657 (1969-12-01), Beaudry
patent: 3660087 (1972-05-01), Kaspaul et al.
patent: 3809635 (1974-05-01), Gillot et al.
patent: 3944686 (1976-03-01), Froberg
patent: 4053350 (1977-10-01), Olsen et al.
patent: 4086108 (1978-04-01), Gonda
Chin Gary
Martin Marietta Corporation
Newsome John H.
Ort Ronald G.
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