Method for the formation of polycrystalline silicon layers, and

Chemistry: electrical and wave energy – Processes and products

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29571, 29584, C25D 1132

Patent

active

044203799

ABSTRACT:
A method for forming a self-aligned MOS power transistor. A layer of silicon nitride is deposited uniformly over a plate with limited oxide zones. The plate is then placed in an acid bath and subjected to a potential difference. Only the zones of the polycrystalline silicon layer which are over the silica zones remain.

REFERENCES:
patent: 3345274 (1967-10-01), Schmidt
patent: 3438873 (1969-04-01), Schmidt
patent: 3634204 (1972-01-01), Dhaka et al.
patent: 3764491 (1973-09-01), Schwartz

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