Semiconductor device manufacturing: process – Chemical etching – Having liquid and vapor etching steps
Reexamination Certificate
2002-04-18
2008-11-18
Hendricks, Keith D. (Department: 1794)
Semiconductor device manufacturing: process
Chemical etching
Having liquid and vapor etching steps
C216S057000
Reexamination Certificate
active
07452821
ABSTRACT:
A method is disclosed by means of which contact holes (K1), (K2) and (K3), leading to integrated components can be produced with just one structuring mask, whereby contact holes (K1) and (K3) lead to contact regions (25e,45e) in the substrate (5) and contact holes (K2) lead to contact regions (35c,50c) located on layer stacks (35, 50). An auxiliary layer is used for the etching of contact holes (K1), (K2), (K3), which covers a part of the contact holes and thus serves as a selection mask. The auxiliary layer can be structured with a low-resolution lithography in comparison with the mask, such that only one single high-resolution lithography is necessary for the formation of all contact holes (K1), (K2), (K3). The method is particularly suitable for the simultaneous production of contact holes for transistors in the cell field and the logic field of a DRAM.
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Gruening-Von Schwerin Ulrike
Gustin Wolfgang
Morhard Klaus-Dieter
Dicke Billig & Czaja, PLLC
George Patricia A
Hendricks Keith D.
Infineon - Technologies AG
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