Method for the fabrication of transistor

Details Method for the fabrication of transistor Method for the fabrication of transistor

1993-11-23

1994-12-20

Thomas, Tom

Fishing, trapping, and vermin destroying

437 40, 437 41, 437 45, 437 56, 437 57, 437192, 437203, H01L 21265

Patent

active

053745744

ABSTRACT:
A method for fabricating a transistor having a lightly doped drain structure is disclosed. The method comprises the steps of: forming a gate insulating film over a first conductive semiconductor substrate; covering the gate insulating film with a gate layer and an insulating film for gate cap, in due order; forming an insulating film for mask over the insulating film for gate cap; applying an etch process to the insulating film for mask to remove a predetermined portion of the insulating film for mask; forming a pair of spacers at both sides of the etched portion of the insulating film for mask; implanting first conductive impurity ions; burying a first material layer in the etched portion of the insulating film for mask; removing the spacers; implanting second impurity ions at a low density to form two lightly doped regions in the semiconductor substrate; removing the first material; burying a second material layer in the etched portion of the insulating film for mask, again; removing the insulating film for mask; applying an etch process to the insulating film for gate cap and the gate layer by use of the second material layer as a mask to form a gate cap insulating film and a gate; and implanting a second conductive impurity ions at a high density to form a high density source region and a high density drain region.

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