Method for the fabrication of a high resistance load resistor ut

Details Method for the fabrication of a high resistance load resistor ut Method for the fabrication of a high resistance load resistor ut

1989-11-13

1990-08-21

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 52, 437 60, 437228, 437233, 437918, 357 51, H01L 2711

Patent

active

049506196

ABSTRACT:
A high resistance load resistor in a static memory device and the method of fabricating such device is disclosed. The device is fabricated by depositing a first insulating oxide layer on a semiconductor substrate and depositing a first polysilicon layer on the first insulating oxide layer. The first polysilicon layer is etched to form a first polysilicon pad and a second polysilicon pad with the first polysilicon pad spaced apart from the second polysilicon pad. A second oxide layer is deposited on the first polysilicon layer and the first oxide layer. The second oxide layer is etched thereby shaping the second oxide island layer to be contiguously positioned on each of the first and second polysilicon pads and on the first oxide layer extending between the first and second polysilicon layers. The shaped second oxide island layer includes a sidewall in contact with the first oxide layer and extending from and in contact with each of the first and second polysilicon pads. A second polysilicon spacer is then formed along and in contact with the sidewall of the shaped second oxide island layer thereby electrically connecting the first and the second polysilicon pads thereby forming a high resistance load resistor in a static memory device.

REFERENCES:
patent: 4315239 (1982-02-01), Domiele et al.
patent: 4464212 (1984-08-01), Bhatia et al.
patent: 4835589 (1989-05-01), Pfiester

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