Method for testing semiconductor devices

Details Method for testing semiconductor devices Method for testing semiconductor devices

1988-06-22

1990-05-01

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

324158R, H01L 2166

Patent

active

049218107

ABSTRACT:
A method for electrically testing integrated circuits in a wafer comprises the steps of forming a layer of material (20) on the surface of the wafer having a dielectric constant which simulates the dielectric constant of the packaging material which will eventually encapsulate the integrated circuits. In one embodiment, photoresist is formed on the integrated circuit prior to wafer test. In this way, during wafer test, the capacitive coupling between the conductive structures (14) in the integrated circuit will accurately simulate the capacitive coupling between these structures after the integrated circuit is encapsulated in the packaging material.

REFERENCES:
patent: 4760032 (1988-07-01), Turner

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