Method for testing large memory arrays during system initializat

Details Method for testing large memory arrays during system initializat Method for testing large memory arrays during system initializat

1994-06-06

1995-12-26

Canney, Vincent P.

Excavating

371 212, G01R 3128

Patent

active

054794137

ABSTRACT:
An improved method for testing a large memory array of a digital computer system during system initialization or reset. First, the memory test method checks the whole memory array for addressing faults, and then a first portion of the memory array for both address line and data failures. While operational firmware is loaded into and begins to execute from the tested first portion, the remaining address locations of the array are tested in a background task. Beginning at the last address of the first portion, sequential portions of memory array are tested and released to the functional code as they have been tested.

REFERENCES:
patent: 4891811 (1990-01-01), Ash et al.
patent: 5155844 (1992-10-01), Cheng et al.

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