Method for testing integrated memory using an integrated DMA con

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371 213, G06F 1100

Patent

active

056688156

ABSTRACT:
A microcontroller includes an integrated memory and an integrated DMA controller. During testing, the DMA controller is used to perform read/write tests of background patterns and complements thereof to the integrated memory. The integrated memory need not contain the BIST logic typically required of integrated memories. By using the DMA controller to perform BIST-type testing, the tests are not hardware-bound. Typically, the BIST logic included in integrated memories is designed and tested during the design of the microcontroller. This design and test time is replaced by a (possibly shorter) task of generating test vectors for the requisite DMA transfers. The risk of having an error in the BIST test is reduced using the present testing method. Formerly, if BIST logic was found to be in error, new manufacturing masks for the microcontroller were required to repair the problem. A large time and monetary investment was required. The present method allows for correction and variation in the testing by resimulating the tests and creating new test vectors. The new test vectors may then be applied to previously manufactured microcontrollers.

REFERENCES:
patent: 4701845 (1987-10-01), Andreasen et al.
patent: 4888773 (1989-12-01), Arlington et al.

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