Method for testing integrated circuit, and wafer

Details Method for testing integrated circuit, and wafer Method for testing integrated circuit, and wafer

2007-08-28

2007-08-28

Nguyen, Ha Tran (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

Reexamination Certificate

active

11493424

ABSTRACT:
A method for manufacturing an integrated circuit, a measurement apparatus of an integrated circuit, and a wafer that reduces damages inflicted on bonding pads while enabling a probe test to be accurately performed. A sensor cell is arranged on a wafer between chip formation regions. The sensor cell has a diaphragm. Sensor pads, connected to a doping region, are arranged on the surface of the diaphragm. Probe needles contact the sensor pads. This strains the doping region and produces a corresponding voltage measured by the probe needles connected to the sensor pads. Relative inclination angle and relative distance of a probe card, which includes the probe needles, and the wafer are determined based on the measured voltage. A conduction test is performed by having the probe needles contact the bonding pad of the wafer while maintaining the determined the relative position.

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