Boots – shoes – and leggings
Patent
1994-12-09
1996-05-14
Teska, Kevin J.
Boots, shoes, and leggings
364490, 364578, 371 221, 371 223, 371 27, 324 731, 3241581, G01R 3128
Patent
active
055176372
ABSTRACT:
A method for testing a test architecture in a circuit is accomplished by receiving or generating, based on the topology information for the circuit, a Boundary Scan Description Language (BSDL) description of the test architecture which is then verified for correct syntax, consistency, and standard compliance. Next, one or more tests are selected from a predetermined set of test methodologies, based on the type of testing to be performed. Self-checking test parameters are generated based on the BSDL description and the selected tests. Using these test parameters, a logic simulation algorithm tests the test architecture of the circuit and generates a report detailing any errors that are discovered.
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Bruce, Jr. William C.
Drufke, Jr. Joseph E.
Eluwa Chema O.
Hudson John M.
Motorola Inc.
Nguyen Tan
Teska Kevin J.
Witek Keith E.
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