Boots – shoes – and leggings
Patent
1985-12-09
1991-12-03
Lee, Thomas C.
Boots, shoes, and leggings
364221, 3642217, 3642312, 364234, 3642382, 3642383, 364260, 364264, 3642642, 364266, 364267, 3642672, 3642675, 3642676, 3642717, 364DIG1, G06F 1100, G06F 1130
Patent
active
050704486
ABSTRACT:
A method for testing an I/O controller (20) associated with a host processor (10) without the need of a special purpose hardware console. At the start of the procedure, a test program is loaded into the random access memory (24) of the I/O controller (20) through the host processor (10) on a cycle stealing basis. Then, an area of the main storage unit (11) of the host processor (10) is cleared for communicating data to the I/O controller (20), again on a cycle stealing basis, for instructing what operations from the test program are to be utilized and to supply data for use in the selected portion of the test program. With this procedure, data can be altered in the random access memory (24), data from the I/O controller (20) displayed on the operator console (13) of the host processor (10) and data on the channel (26) from an I/O device (30) examined without having to greatly disturb the operations of the host processor (10).
REFERENCES:
patent: 3324458 (1967-06-01), MacArthur
patent: 3806878 (1974-04-01), Edstrom
patent: 3831148 (1974-08-01), Greenwald et al.
patent: 3838400 (1974-09-01), Meadows et al.
patent: 3916177 (1975-10-01), Greenwald
patent: 3927310 (1975-12-01), D'Anna et al.
patent: 3940744 (1976-02-01), Mock et al.
patent: 3987420 (1976-10-01), Badagnani
patent: 4023142 (1977-05-01), Woessner
patent: 4028536 (1976-02-01), Woodward
patent: 4034194 (1977-07-01), Thomas et al.
patent: 4041455 (1977-08-01), Norberg
patent: 4047158 (1977-09-01), Jennings
patent: 4159534 (1979-06-01), Getson, Jr. et al.
patent: 4167779 (1979-09-01), Sullivan et al.
patent: 4212059 (1980-07-01), Sato et al.
patent: 4231087 (1980-10-01), Hunsberger et al.
patent: 4280285 (1981-07-01), Haas
patent: 4315313 (1982-02-01), Armstrong et al.
patent: 4371932 (1983-01-01), Dinwiddie, Jr. et al.
patent: 4417304 (1983-11-01), Dinwiddie, Jr.
patent: 4456994 (1984-06-01), Segarra
patent: 4479179 (1984-10-01), Dinwiddie, Jr.
patent: 4484329 (1984-11-01), Slamka et al.
A. J. Heimsoth et al., "On-Line" Error & Statistics Logging in Large Data Base Systems, IBM Technical Disclosure Bulletin (vol. 19, No. 8), Jan. 1977, pp. 2874-2876.
R. E. Birney et al., Save Storage Address on Error Class Interupts, IBM Technical Disclosure Bulletin (vol. 19, No. 11), Apr. 1977, pp. 4062-4068.
IBM Series / 1-4955 Processor and Processor Features Description, Oct. 15, 1979.
Harrell Robert B.
International Business Machines Coproration
Lee Thomas C.
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