Method for testing a memory chip, divided into cell arrays, duri

Data processing: measuring – calibrating – or testing – Testing system – Of circuit

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371 102, 371 103, 371 211, 365201, 36523003, G06F 1100

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059373679

ABSTRACT:
Memory modules contain most of the transistors in a computer and thus constitute the most important components to be tested. In order, for example, to monitor the function of memory chips in applications which are critical for safety, it is necessary to carry out memory tests during ongoing operation of a computer. Furthermore, it is appropriate to make these memory tests possible under real-time conditions so that the application program can run without degradation. Highly effective memory tests enable stuck-at faults, connection faults and pattern-sensitive faults to be detected. In the method, the highly effective memory test is performed during ongoing operation of a computer while maintaining real-time conditions by dividing testing into a suitable combination of Franklin tests, which discover pattern-sensitive faults of adjacent memory cells, and of Nair tests, which discover connection faults in the incoming lines.

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