Boots – shoes – and leggings
Patent
1994-08-31
1996-03-26
Coleman, Eric
Boots, shoes, and leggings
3642601, 364271, 3642711, 364DIG1, G06F 1200
Patent
active
055028357
ABSTRACT:
An integrated circuit microprocessor (30) reads data from an external memory device (22, 23) through early overlapping memory access cycles, thus allowing efficient accesses to slower-speed memory. The microprocessor (30) drives a first address and activates a chip enable signal during a first clock period. The chip enable signal causes the external memory device to latch the first address and begin a first memory access. During a second, subsequent clock period, the microprocessor (30) provides a second address and again activates the chip enable signal. During a third clock period, subsequent to the second clock period, the microprocessor (30) latches a first data element associated with the first address. This early overlapping memory access type allows a memory device with a slow memory core to pipeline the second access prior to completion of the first access, increasing system efficiency.
REFERENCES:
patent: 4509142 (1985-04-01), Childers
patent: 4908749 (1990-03-01), Marshall
patent: 5151986 (1992-09-01), Langan et al.
patent: 5367645 (1994-11-01), Lubeck
patent: 5388232 (1995-02-01), Sullivan
patent: 5440717 (1995-08-01), Bosshart
"MC68332 User's Manual", (System Integration Module), Motorola, Inc., 1990, pp. 4-27 through 4-46.
Downs Terry E.
Le Chinh H.
Vauk, Jr. Gerald E.
Coleman Eric
Motorola Inc.
Polansky Paul J.
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