Method for synchronization of a clock signal, which can be gener

Details Method for synchronization of a clock signal, which can be gener Method for synchronization of a clock signal, which can be gener

1999-01-26

2000-11-14

Chin, Stephen

Pulse or digital communications

Synchronizers

370509, 709400, H04L 700, H04J 306, G06F 112

Patent

active

061480495

ABSTRACT:
A method for synchronization of a clock signal, which can be generated in a data receiving station, with a clock signal which is used in a data transmitting station. The synchronization is in each case carried out by evaluating a value and a time of received timemark data which represents a count that is dependent on the clock signal frequency in which the timemark data are transmitted to the data receiving station from the data transmitting station. The described method is distinguished by the fact that a parameter which characterizes the frequency of the clock signal of the data transmitting station is estimated in the data receiving station, at least partially taking into account the respective current timemark data and the previously received timemark data, and by the fact that a clock signal generator, which produces the clock signal to be synchronized, is triggered on the basis of the estimated value obtained in this way.

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patent: 5790543 (1998-08-01), Cloutier
patent: 5896524 (1999-04-01), Halstead, Jr. et al.
"Timing and Synchronization Using MPEG-2 Transport Streams", David K. Fibush, SMPTE Journal, Jul. 1996, pp. 395-400.
"Optimal MMSE Gear-shifting Algorithm for the Fast Synchronization of DPLL", Beomsup Kim, IEEE International Symposium on Circuits and Systems, 1993, pp. 172-175.
"Standard Recursive Least-Squares Estimation", 13 XP 003047438, pp. 477 and 478.
"Clock Recovery Circuit Based on Preset Counter", IBM Technical Disclosure Bulletin, vol. 29, No. 2, Jul. 1986, pp. 903 and 904.

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