Method for switching a system clock and clock...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – Having selection between plural continuous waveforms

Reexamination Certificate

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Details

C327S298000, C327S407000

Reexamination Certificate

active

07605617

ABSTRACT:
A clock synchronization unit is provided for an electronic system, particularly for a microprocessor, that includes a first input for a first clock signal, a second input for a second clock signal, a third input for a select control signal, and an output for a system clock signal. A first control module controlled by the first clock signal, a second control module controlled by the second clock signal and connected to the first control module in terms of signaling technique is also provided. The first control module upon application of a predefined signal level of the select control signal at the third input synchronously with the first dock signal, is designed to set the system clock signal from the first clock signal to a predefined logic signal level as the system clock hold signal, and the second control module is designed, synchronously with the second clock signal, to reset the system clock hold signal and to cause an output of the second clock signal as the system clock signal.

REFERENCES:
patent: 5675165 (1997-10-01), Lien
patent: 5864564 (1999-01-01), Levitt et al.
patent: 6107841 (2000-08-01), Goodnow
patent: 6341355 (2002-01-01), Rutherford et al.
patent: 6873183 (2005-03-01), Kaviani
patent: 2002/0125914 (2002-09-01), Kim
patent: 2004/0263217 (2004-12-01), Hutson et al.
patent: 0 699 991 (1996-03-01), None
patent: 0 969 350 (2000-01-01), None
patent: WO-01/59550 (2001-08-01), None

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