Method for storing data words in fault tolerant memory to recove

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371 38, G06F 1110

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044583494

ABSTRACT:
A method of operating a large fault tolerant semiconductor memory is described which increases the probability that data words read from memory will not contain uncorrectable errors. The method involves storing a data word at a location in memory that may have a defect in either the true form or compliment form depending on which form will be perceived by an error correcting system as containing no errors on readout. Each data word transferred to memory is tested to see if one form or the other results in an error on readout. If the true form results in an error indication, the data portion of the word is stored in compliment form and the check byte stored in true form.
On a subsequent transfer of the word from memory, the ECC system indicates an apparent uncorrectable error resulting from both portions of the word being stored in a different form while in fact the uncorrectable error indication is a signal that the data portion was stored in compliment form. The arrangement allows the ECC system to correct soft or intermittant type errors even though they occur at a memory address having one defect.

REFERENCES:
patent: 4037091 (1977-07-01), Beuscher
patent: 4175692 (1979-11-01), Watanabe
patent: 4394763 (1983-07-01), Nagano et al.
Bachman et al., Multiple Error Correction, IBM Technical Disclosure Bulletin, vol. 13, No. 8, Jan. 1981, p. 2190.
Datres et al., Multiple Memory Error Correction, IBM Technical Disclosure Bulletin, vol. 24, No. 6, Nov. 1981, p. 2690.

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