Method for source bias all bit line sensing in non-volatile...

Details Method for source bias all bit line sensing in non-volatile... Method for source bias all bit line sensing in non-volatile...

2007-06-29

2008-12-30

Mai, Son L (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185170, C365S185180

Reexamination Certificate

active

07471567

ABSTRACT:
Bit line-to-bit line noise is discharged in a NAND string prior to sensing a programming condition of a selected non-volatile storage element in the NAND string. A source voltage is applied which boosts the voltage in conductive NAND strings. The voltage boost results in capacitive coupling of noise to neighboring NAND strings. A current pull down device is used to discharge each NAND string prior to performing sensing. After each NAND string is coupled to a discharge path for a predetermined amount of time, bit lines of the NAND string are coupled to voltage sense components for sensing the programming condition of the selected non-volatile storage elements based on a potential of the bit lines. The selected non-volatile storage elements may have a negative threshold voltage. Further, a word line associated with the selected non-volatile storage elements may be set at ground.

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