Method for simulating ULSI/VLSI circuit designs

Details Method for simulating ULSI/VLSI circuit designs Method for simulating ULSI/VLSI circuit designs

1996-12-13

2000-08-29

Teska, Kevin J.

39550006, G06F 1750

Patent

active

061120227

ABSTRACT:
A method for identifying and selecting pertinent subcircuits from a given circuit design for generating simulation results representative of the given circuit design is disclosed. A large circuit design having a number of input pins and output pins, and one or more clock pins can be simulated by a number of subcircuits where each subcircuit is comprised of circuit information from an input pin to one or more latch devices, an output pin to one or more latch devices, or an output pin to one or more input pins. A latch device can be a flip-flop.

REFERENCES:
patent: 5400270 (1995-03-01), Fukui et al.
patent: 5553008 (1996-09-01), Huang et al.
patent: 5598344 (1997-01-01), Dangelo et al.
patent: 5706477 (1998-01-01), Goto
patent: 5740347 (1998-04-01), Avidan

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