Method for simulating impurity diffusion in semiconductor with o

Details Method for simulating impurity diffusion in semiconductor with o Method for simulating impurity diffusion in semiconductor with o

1997-08-21

1999-10-05

Teska, Kevin J.

39550028, 39550033, 3955003, G06F 1750, G06T 1720

Patent

active

059637323

ABSTRACT:
In a method for simulating a concentration of impurities within a semiconductor device while the semiconductor device is being oxidized, the semiconductor device is divided into a triangular mesh configuration having grids arranged in triangles. One of the triangles is divided into three control volumes, and each of the control volumes includes a circumcenter and one grid of a respective one of the triangles.

REFERENCES:
patent: 5675522 (1997-10-01), Akiyama
patent: 5677846 (1997-10-01), Kumashiro
Coughran et al.: Adaptive Grid Generation for VLSI Device Simulation, IEEE Trans. Computer-Aided Design, vol. 10, No. 10, Nov. 1991.
C. S. Rafferty et al., "Iteractive Methods in Semiconductor Device Simulation", IEEE Trans. Electron Devices, vol. ED-32, No. 10, pp. 2018-2027, Oct. 1985.
M. S. Muck, "Tetrahedral Elements and the Sharfetter-Gummel Method", Proceedings of the Nasecode IV, pp. 36-47, 1985.

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