Method for simulating and testing an integrated circuit chip

Metal working – Method of mechanical manufacture – Electrical device making

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Details

29593, 324 73R, 324 73PC, 361412, 361415, 364490, H05K 336, G01R 300, H01K 112

Patent

active

044883544

ABSTRACT:
A method and apparatus for simulating custom chips to be used in a data processing system. Each chip is simulated by a chip simulator that includes a mother board and a plurality of baby boards mounted and interconnected on the mother board. Each baby board has circuit components mounted thereon for performing the circuit function of one cell of the chip. Chip simulators are interconnected in an interconnecting apparatus that supports the mother boards in parallel and spaced apart relation. Chip simulators that represent all of the chips found on a single printed circuit board in the system are interconnected at the interconnecting apparatus so that design errors which are only evident when the chips are interconnected can be tested for and detected prior to fabrication of the chips.

REFERENCES:
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patent: 4134631 (1979-01-01), Conrad et al.
patent: 4401351 (1983-08-01), Record
P. Rony, D. Larsen & R. Braden, The Bugbook I, (1974), Unit No. 1, (Published by E&L Instruments, Inc., Derby, Conn.).
Interdesign, Inc., Semicustom Integrated Circuits, (Advertising Brochure)-Undated.

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