Method for silicon island formation

Details Method for silicon island formation Method for silicon island formation

1996-07-08

1999-10-05

Bowers, Charles

Semiconductor device manufacturing: process

Making device or circuit responsive to nonelectrical signal

Responsive to electromagnetic radiation

438 52, 438355, 438410, 257513, H01L 2176, H01L 2144

Patent

active

059637897

ABSTRACT:
A method is disclosed of manufacturing improved device structures which include a device structure having STI and a thin foot charge drain beneath the device area on an inexpensive bulk silicon substrate. The structures retain high speed operation of SOI devices without any adverse effects of charge build-up and floating effects as observed in conventional SOI devices, and, furthermore, are constructed without any extra process steps added to the conventional STI technology except for an isotropic etching step. The invention also contemplates construction of multi-level electronic circuit. In various embodiments, the invention includes steps of forming a photoresist pattern over a semiconductor substrate to designate a plurality of islands, anisotropic etching the substrate to form plurality of designate islands which develops thin passivation layer on the sidewall, performing successively an isotropic etching on the resulting structure to create a thin foot region under each of the plurality of the islands with the help of the passivation layer, and forming a thin thermal oxide layer to improve the interface quality between each thin foot region and the insulator. Additional layers of silicon islands may be formed on the resulting structure.

REFERENCES:
patent: 4264382 (1981-04-01), Anantha et al.
patent: 4361600 (1982-11-01), Brown
patent: 4485551 (1984-12-01), Soclof
patent: 4502913 (1985-03-01), Lechaton et al.
patent: 4533430 (1985-08-01), Bower
patent: 4551743 (1985-11-01), Murakami
patent: 4561932 (1985-12-01), Gris et al.
patent: 4604162 (1986-08-01), Sobczak
patent: 4611387 (1986-09-01), Soclof
patent: 4615746 (1986-10-01), Kawakita et al.
patent: 4661832 (1987-04-01), Lechaton et al.
patent: 4692994 (1987-09-01), Moniwa et al.
patent: 4763183 (1988-08-01), Ng et al.
patent: 4814287 (1989-03-01), Takemoto et al.
patent: 4845048 (1989-07-01), Tamaki et al.
patent: 4874718 (1989-10-01), Inoue
patent: 4925805 (1990-05-01), van Ommen et al.
patent: 4933298 (1990-06-01), Hasegawa
patent: 5028549 (1991-07-01), Chang et al.
patent: 5061655 (1991-10-01), Ipposhi et al.
patent: 5128732 (1992-07-01), Sugahara et al.
patent: 5264721 (1993-11-01), Gotou
patent: 5270265 (1993-12-01), Hemmenway et al.
patent: 5365081 (1994-11-01), Yamazaki et al.
patent: 5405454 (1995-04-01), Hirai et al.
patent: 5426070 (1995-06-01), Shaw et al.
patent: 5440161 (1995-08-01), Iwamatsu et al.
patent: 5445107 (1995-08-01), Roth et al.
IBM technical disclosure bulletin vol. 26#Feb. 9, 1984.
Formation of Silison Nitride at a Si-SiO2 interface . . . E. Kooi Electrochemical society V123/ Jul. 7, 1976.

Affiliated with

Also associated with

Rating

Method for silicon island formation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for silicon island formation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for silicon island formation will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1182400