Patent
1993-06-11
1999-07-27
Chan, Eddie P.
395474, 395559, G06F 1336
Patent
active
059305029
ABSTRACT:
A data processing system includes a shared random-access memory which is shared between a first and second asynchronous processor, wherein an access to the memory is clocked by a clock signal issuing from a first processor. A two-state selection signal is generated having a frequency equal to half the frequency of the clock signal. Access to the memory by the first processor to the memory is enabled when the selection signal is in a first state, and access to the memory by the second processor to the memory is enabled when the selection signal is in a second state. Thus, a memory is shared between two processors of different speeds, the clock signal therefore issuing from the faster processor.
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patent: 5263150 (1993-11-01), Chai-I Fan
Menut Patrick
Picco Andre
Chan Eddie P.
Nguyen Hiep T.
SGS-Thomson Microelectronics S.A.
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