Boots – shoes – and leggings
Patent
1995-05-31
1997-08-05
Teska, Kevin J.
Boots, shoes, and leggings
36446801, 364578, 364490, G05B 1304
Patent
active
056551100
ABSTRACT:
A method and system are disclosed for: (a) matching a machine-implemented process simulator with an actual fabrication line, (b) using the matched model to simulate the statistical results of mass production by the modeled production line, (c) using the model to predict cross-reticle variance from collected data for in-scribe features, (d) using the model to decompose the variance contributions of each process parameter and identify the more prominent contributors, and (e) using the model to identify the process parameter adjustments which would provide best leverage when taken one at a time.
REFERENCES:
patent: 4901242 (1990-02-01), Kotan
patent: 5111404 (1992-05-01), Kotani
patent: 5260865 (1993-11-01), Beauford et al.
patent: 5301118 (1994-04-01), Heck et al.
patent: 5319564 (1994-06-01), Smayling et al.
patent: 5341302 (1994-08-01), Connors et al.
patent: 5402367 (1995-03-01), Sullivan et al.
patent: 5438527 (1995-08-01), Feldbaumer et al.
patent: 5495417 (1996-02-01), Fuduka et al.
Dance et al., "Appl. of yield models for semiconductor yield improvement", Defect & Fault Tolerance on VLSI Systems, 1992 pp. 257-266.
Boning et al., "DOE/Opt: A Sys for Design of Experiments, Response Surface Modeling, & Optimization Using Process & Device Simulation", IEEE Trans on Semiconductor Mfg, vol. 7, Iss. 2, May 1994, pp. 233-244.
Iravani et al., "Statistical Modeling Tools, Methods & Applications for IC Mfg", Pra IEEE '95 Conf on Microelectronic Test Structures, vol. 8, Mar. 1995, pp. 203-207.
Williams et al., "Application of Process Statistics to Macro/Behavioral Modeling" IEEE 1993, pp. 515-518.
Pinto et al., "VLSI Tech Dev by Predictive Simulation", 1933 IEEE, pp. 29.1.1-29.1.4.
Duvall, "Towards a Practical Methodology for the Statistical Design of Complex IC Products", 1993 VLSI TSA, pp. 112-116.
Boskin et al., "A Method for Modeling the Manufacturability of IC Design", Proc IEEE Inf Conf on Microelectronics Test Structures, vol. 6, Mar. 1993, pp. 241-246.
Kizilyalli et al., "Predictive Worst Case Statistical Modeling of 0.8 .mu.m Bicmos Bipolar Transistors: A Methodology Based on Process & Mixed Device/Circuit Level Simulators", IEEE Trans. on Electron Devices, vol. 40, No. 5, May 1993, pp. 966-973.
Welten et al., "Statistical Worst-Case Simulation for CMOS Technology", IEE Collog. No. 153: Improving the Efficiency of IC Mfg. Technology, 1995.
Niu et al., "A Bayesiar Approach to Variable Screening for Modeling the IC Fabrication Process", Circuits & Systems, 1995 IEEE Int'l Symposium, pp. 1227-1230.
Lopez-Serrano et al., "Yield Enhancement Prediction w/Statistical Process Simulations in an Advanced Poly-emitter Complementary Bipolar Technology", IEEE 1994 Custom IC Conf. pp. 13.1.1(289)-13.1.4(292).
Reitman et al., "Process Models & Network Complexity", 1993 Int'l Conf on Neural Networks, pp. 1265-1269.
Smith et al., "Comparison of Scalar & Vector diffraction Moedlling for deep-UV lithography", SPIE vol. 1927 Optical/Laser Microlithography VI-1993, pp. 847-857.
Dill et al., "Modelling Positive Photoresist", Proceedings of the Kodak Microelectronics Seminar, Oct. 1974, pp. 24-31.
Owen, "Controlling Correlations in Latin Hypercube Samples", 1994 Jour. Amer. Statistical Assoc., vol. 89 No. 428, Dec. 1994, pp. 1517-1522.
Heavlin, "Variance Components & Computer Experiments", Proc 1994 Amer. Statistical Assoc., pp. 103-108.
Mack, "Development of Positive Photoresists", Jour. Electrochem. Soc: Solid State Sci. & Tech., vol. 134 Issue 1, Jan. 1987, pp. 148-152.
Stein, "Large Sample Properties of Simulations Using Latis Hypercube Sampling", Technometrics, vol. 29 Iss. 2, May 1987, pp. 143-151.
Neureather et al., "Photoresist Modeling & Device Fabrication Appl.", Optical & Acoustical Microelectronics, 1974, pp. 223-247.
Mandel, The Statistical Analysis of Experimental Date, John Wiley & Sons, 1964, Chap. 12, pp. 272-310.
Heavlin William D.
Krivokapic Zoran
Kyser David F.
Advanced Micro Devices , Inc.
Teska Kevin J.
Walker Tyrone V.
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