Method for sensing state of erasure of a flash electrically eras

Details Method for sensing state of erasure of a flash electrically eras Method for sensing state of erasure of a flash electrically eras

1998-08-12

2000-01-04

Hoang, Huan

Static information storage and retrieval

Floating gate

Particular biasing

36518519, 36518521, G11C 1606

Patent

active

060117214

ABSTRACT:
A flash Electrically-Erasable Programmable Read-Only Memory (EEPROM) includes a plurality of field effect transistor memory cells each having a source, drain, floating gate and control gate. The memory further includes a resistive power supply, a sensor, and a controller which cooperates with the power supply. The power supply applies a source voltage to the sources of the cells that can have a maximum value. An erase pulse is applied to the cells during which the power supply is configured to allow the source voltage to clamp to the maximum value. A monitoring pulse is then applied to the cells during which the power supply is configured to prevent the source voltage from clamping to the maximum value. The sensor senses the source voltage while the monitoring pulse is applied. As the source voltage is not clamped, it is substantially a function of band-to-band tunneling current and accurately indicates the average state of erasure of the cells. The power supply includes a resistance and/or a current source which can be varied to reduce the source current while the monitoring pulse is being applied and thereby avoid clamping.

REFERENCES:
patent: 5544117 (1996-08-01), Nakayama et al.
patent: 5600593 (1997-02-01), Fong
patent: 5646891 (1997-07-01), Okamoto
patent: 5943266 (1999-08-01), Ogura et al.

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