Method for semiconductor manufacturing

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Making plural bipolar transistors of differing electrical...

Reexamination Certificate

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C438S350000, C438S205000

Reexamination Certificate

active

06313001

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for semiconductor manufacture, and more specifically to manufacture of a multiple of bipolar or MOS transistors of a specific type on a semiconductor substrate, where each semiconductor transistor may have different characteristics.
DESCRIPTION OF RELATED ART
Bipolar integrated circuits play a major role in modern telecommunication systems. The bipolar circuits are mostly used for analogue functions, e.g. for switching currents and voltages, and for high-frequency radio circuit functions (mixers, amplifiers, detectors, etc.).
A common trend in microelectronics is to integrate more and more functions on a single chip, in order to increase the general performance, and to reduce the size, the power consumption and the prize of the system. This integration has some drawbacks, one is that the device characteristics can not be separately optimised for each different sub block that is being integrated. Instead the characteristics must be selected to some compromise that fits the different devices requirements equally well. This is especially true if one of the parameters to obtain maximum performance before integration was the use of different supply voltages.
The electrical performance of a bipolar transistor is mainly set by its vertical emitter/base/collector profile, where the characteristics of the base is usually the dominating part. The base is commonly formed by ion implantation. An activation anneal/drive-in heat cycle then finalises the emitter/base/collector profile.
By varying the parameters for these two steps, the characteristics of the transistor can be tuned in a large range. For a device which will be operated at very high frequencies, a shallow and abrupt base (obtained by using low implantation energy and short heat cycle) is necessary, while for low-noise transistors or switching transistors, wider bases with lower base resistance and/or better current handling capacity are preferred.
When manufacturing semiconductor devices on a semiconductor substrate, each type of active device, e.g. NMOS transistor or NPN bipolar transistor, is usually made with one predetermined set of characteristics, due to difficulties in controlling different characteristics within each type of active device. Variations in characteristics are preferably made by altering the geometric pattern of the active devices.
The common way of making semiconductor devices comprises the following steps: masking, introducing dopants in unmasked areas and annealing. The introduction of dopants is normally made by ion implantation and determines a part of the characteristics of each device.
A semiconductor circuit may include active devices, e.g. transistors, and passive devices, e.g. resistors and capacitors. More complex circuits include transistors of different types, e.g. BiCMOS processes. Such a process is described in U.S. Pat. No. 5,149,663 by Chai et al, where different types of transistors are manufactured simultaneously.
Introduction of dopants may also be performed sequentially in the same unmasked area before annealing, as described in U.S. Pat. No. 4,596,605.
In U.S. Pat. No. 4,133,701, by Greenstein et al., a method is described for making bipolar transistors having different characteristics. Selected halogen ion implanted is used to locally specifically enhance phosphorus diffusion, which is used to form the emitter region. The halogen implantation is performed prior to boron diffusion, which is used to form the base region. The halogen implantation causes the emitter region to be deeper, but does not affect the base region.
In EP 0 143 670, by Fujitsu Limited, a method is described for making different types of bipolar transistors having different characteristics on the same substrate. This is achieved by simultaneous making the base region for selected transistors and the emitter region for all transistors. The purpose with the invention is to manufacture a bipolar transistor having high switching speed and at the same time manufacture a bipolar transistor having a high withstand voltage.
The above mentioned prior art does not anticipate the need for having transistors of the same type with different sets of characteristics implemented on the same chip.
SUMMARY
A first problem not solved by the prior art is how to manufacture at least two bipolar transistors of the same type, each transistor having essentially the same emitter region, but different characteristics.
A second problem not solved by the prior art is how to manufacture at least two MOS transistors of the same type, each transistor having essentially the same source and drain region, but different characteristics.
The first problem is solved by a method for semiconductor manufacturing of at least one semiconductor circuit, which circuit comprises a multiple of bipolar transistors of a specific type being implemented on a semiconductor substrate. The method comprises the steps of: arranging a first region on said semiconductor substrate having a first dopant of a first type, forming at least a first and a second base region in said first region, forming an emitter region by introducing a second dopant of said first type into each of said base regions, and forming a collector region by introducing a third dopant of said first type into said first region. The step of forming said base regions comprises the steps of: introducing at least a fourth and a fifth dopant of a second type, opposing said first type, said fourth and fifth dopant having different sets of dose parameters, into at least a first and a second area of said first region, respectively, and annealing said substrate to create said at least first and second base region, respectively, prior to said steps of forming said emitter, whereby at least two base regions are created with different doping profiles during a single step of annealing, and at least two bipolar transistors are created with different characteristics in said semiconductor circuit.
The second problem is solved with a similar method for semiconductor manufacturing of at least one semiconductor circuit, which circuit comprises a multiple of MOS transistors of a specific type being implemented on a semiconductor substrate. The method comprises the steps of: arranging a first region on said semiconductor substrate, forming at least a first and a second channel region in said first region, and forming a source region and a drain region by introducing a first dopant of a first type on two opposite sides of each channel region. The step of forming said channel regions comprises the steps of: introducing at least a second and a third dopant of a second type, opposite said first type, said second and third dopant having different sets of dose parameters, into at least a first and a second area of said first region, respectively, and annealing said substrate to create said at least first and second channel region, respectively, prior to said step of forming said source region and drain region, whereby at least two channel regions are created with different doping profiles during a single step of annealing, and at least two MOS transistors are created with different threshold voltage in said semiconductor circuit.
More detailed embodiments of the present invention is set forth in the independent claims.
An advantage with the present invention is the possibility to combine transistors of the same type, such as a NPN bipolar transistor, with different sets of characteristics on the same semiconductor circuit, and thereby optimise the performance and function of the chip.
Another advantage is that the characteristics of the different devices can be varied within a large range.


REFERENCES:
patent: 3969748 (1976-07-01), Horie et al.
patent: 4025364 (1977-05-01), Smith
patent: 4043849 (1977-08-01), Kraft et al.
patent: 4133701 (1979-01-01), Greenstein et al.
patent: 4535531 (1985-08-01), Bhatia et al.
patent: 4596605 (1986-06-01), Nishizawa et al.
patent: 4882294 (1989-11-01), Chistenson
patent: 5149663 (1992-09-01), Chai et al.
patent: 0 143

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