Method for selective PSM with assist OPC

Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask

Reexamination Certificate

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C430S311000

Reexamination Certificate

active

06406819

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a VLSI circuit design method, and more particularly to a method for selective phase shift mask with assist optical proximity correction.
2. Description of the Prior Art
A very large scale integrated (VLSI) complementary metal oxide semiconductor (CMOS) chip is manufactured on a silicon wafer by a sequence of material additions (i.e., low pressure chemical vapor depositions, sputtering operations, etc.), material removals (i.e., wet etches, reactive ion etches, etc.), and material modifications (i.e., oxidations, ion implants, etc.). These physical and chemical operations interact with the entire wafer. For example, if a wafer is placed into an acid bath, the entire surface of the wafer will be etched away. In order to build very small electrically active devices on the wafer, the impact of these operations has to be confined to small, well-defined regions.
Lithography in the context of VLSI manufacturing of CMOS devices is the process of patterning openings in photosensitive polymers (sometimes referred to as photoresists or resists) which define small areas in which the silicon base (or other) material is modified by a specific operation in a sequence of processing steps. The manufacturing of CMOS chips involves the repeated patterning of photoresist, followed by an etch, implant, deposition, or other operation, and ending in the removal of the expended photoresist to make way for a new resist to be applied for another iteration of this process sequence.
The basic lithography system consists of a light source, a stencil or photomask containing the pattern to be transferred to the wafer, a collection of lenses, and a means for aligning existing patterns on the wafer with patterns on the mask. Since a wafer containing from fifty to one hundred chips is patterned, a lithography stepper is limited by parameters described in Rayleigh's equation:
R×k
1
*&lgr;/NA
Where &lgr; is the wavelength of the light source used in the projection system and NA is the numerical aperture of the projection optics used. k1 is a factor describing how well a combined lithography system can utilize the theoretical resolution limit in practice and can range from 0.8 down to 0.5 for standard exposure systems. The highest resolution in optical lithography is currently achieved with deep ultra violet (DUV) steppers operating at 248 nm wavelength. Steppers operating at a wavelength of 356 nm are also in widespread use.
Conventional photomask consisted of chromium patterns on a quartz plate, allowing light to pass wherever the chromium is removed from the mask. Light of a specific wavelength is projected through a mask onto the photoresist coated wafer, exposing the resist wherever hole patterns are placed on the mask. Exposing the resist to light of appropriate wavelength causes modifications in the molecular structure of the resist polymers which allows a developer chemical to dissolve and remove the resist in the exposed areas. (Conversely, negative resist systems allow only unexposed resist to be developed away.) The photomask, when illuminated, can be pictured as an array of individual, infinitely small light sources, which can be either turned on (points covered by clear areas) or turned off (points covered by chrome).
These conventional photomasks are commonly referred to as chrome on glass (COG) binary masks. The perfectly square step function exists only in the theoretical limit of the exact mask plane. At any distance away from the mask, such as in the wafer plane, diffraction effects will cause images to exhibit a finite image slope. At small dimensions, that is, when the size and spacing of the images to be printed are small relative to &lgr;/NA (NA being the numerical aperture of the exposure system), electric field vectors of nearby images will interact and add constructively. The resulting light intensity curve between features is not completely dark, but exhibits significant amounts of light intensity created by the interaction of adjacent features. The resolution of an exposure system is limited by the contrast of the projected light image, that is the intensity difference between adjacent light and dark features. An increase in the light intensity in nominally dark regions will eventually cause adjacent features to print as one combined structure rather than discrete images.
The quality with which small images can be replicated in lithography depends largely on the available process latitude, that is, the amount of allowable dose and focus variation that still results in correct image size. Phase shifted mask (PSM) lithography improves the lithographic process latitude or allows operation of a lower k
1
value (see equation 1) by introducing a third parameter on the mask. The electric field vector, like any vector quantity, has a magnitude and direction, so in addition to turning the electric field amplitude on and off, the phase of the vector can be changed. This phase variation is achieved in PSM's by modifying the length that a light beam travels through the mask material. By recessing the mask by the appropriate depth, light traversing the thinner portion of the mask and light traversing the thicker portion of the mask will be &pgr; out of phase, that is, their electric field vectors will be of equal magnitude but point in exactly opposite directions so that any interaction between these light beams results in perfect cancellation. Next, a method using phase shift mask to improve the resolution in photolithography is introduced.
FIG.
1
(
a
) shows a cross-sectional view of a conventional mask
10
made of quartz with a circuit design image in chrome
11
. This is referred to as a “chrome on glass” or binary mask. FIG.
1
(
b
) shows a graph of the electric field formed on the mask. FIG.
1
(
c
) shows a graph of an electric field on the wafer. FIG.
1
(
d
) shows a graph of the light intensity on the resist film on the wafer.
The minimum dimensions of circuits formed by photolithographic processes generally decrease as improvements in semiconductor manufacturing processes occur. Improving photolithography technology provides improved resolution, resulting in a potential reduction of the minimum dimensions of and spaces between electromagnetic radiation application regions where electromagnetic radiation is applied through the mask.
Recent improvements in photolithographic masks often involve phase shifting techniques, in which certain of the openings, or portions of openings, are phase shifted with respect to adjacent openings.
An example of phase shifting is shown in FIG.
2
(
a
). Phase shifting provides a means by which every other element in a closely packed array of circuit elements is phase shifted which leads to enhancement of the edge contrast. The openings in the mask are typically configured in an array of openings which are phase shifted, and non-phase shifted, along two perpendicular axes of the mask. FIG.
2
(
a
) shows a cross-sectional view of the phase shifting openings
12
and the non-phase shifting openings
13
. The electromagnetic radiation that passes through the phase shifting openings interferes destructively in the spaces with the electromagnetic radiation passing through the nonshifting openings, and thereby reduces the intensity of electromagnetic radiation within the unaffected spaces. FIG.
2
(
b
) shows a graph of the electric field on the mask. FIG.
2
(
c
) shows a graph of the electric field on the wafer. FIG.
2
(
d
) shows a graph of the light intensity on the wafer.
Because phase shifting techniques improve the resolution of photolithographic masks in many layout configurations, considerable reticle manufactures now use phase shifting techniques. However, the applications of phase shift mask cannot be employed everywhere, especially when the opening pattern formed on each mask is not regular and repeatable. Moreover, when the increased transistor is designed in the same area of a die, the shrink design rule can not push phase shift mask

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