Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2006-05-23
2006-05-23
Luu, Chuong Anh (Department: 2818)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S240000, C438S243000, C438S386000
Reexamination Certificate
active
07049246
ABSTRACT:
Method for selective fabrication of high capacitance density areas in a low dielectric constant material and related structure are disclosed. In one embodiment, a first area of a dielectric layer is covered while a second area of the dielectric layer is exposed to a dielectric conversion source. The exposure causes the dielectric constant of the dielectric layer in the second area to increase. A number of interconnect trenches are etched in the first area of the dielectric and a number of capacitor trenches are etched in the second area of the dielectric. The interconnect trenches and the capacitor trenches are then filled with an appropriate metal, such as copper, and a chemical mechanical polish is performed. The second area in which the capacitor trenches have been etched and filled has a higher capacitance density relative to the first area.
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Brongo Maureen
Feiler David
Liu Q. Z.
Sherman Phil N.
Zhao Bin
Farjami & Farjami LLP
Luu Chuong Anh
Newport Fab LLC
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