Static information storage and retrieval – Floating gate – Particular biasing
Patent
1992-11-17
1994-10-18
LaRoche, Eugene R.
Static information storage and retrieval
Floating gate
Particular biasing
365218, G11C 1140
Patent
active
053574630
ABSTRACT:
A method of erasing, programming, and verifying a flash electrically erasable programmable read-only memory where all cells are first erased to a high threshold voltage, preferably by simultaneous Fowler-Nordheim tunnelling, and then selected cells are programmed to a low threshold voltage using Fowler-Nordheim tunnelling. Programming is achieved by applying a negative voltage to the selected wordline and applying a positive voltage to the selected bitline. Only those cells which have both the wordline and bitline selected will have sufficient wordline-to-bitline voltage difference to cause programming. A key advantage of this new method is that a verification (read) procedure can be used to monitor for the desirable tight distribution, low threshold voltage V.sub.t on programmed cells and re-program only those cells which have a V.sub.t higher than the desired V.sub.t. The resulting tight distribution of cell current in programmed cells will lead to faster and more reliable read characteristics for these devices.
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LaRoche Eugene R.
Le Vu
Micron Semiconductor Inc.
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