Semiconductor device manufacturing: process – Having organic semiconductive component
Reexamination Certificate
2002-08-29
2004-03-30
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Having organic semiconductive component
C438S003000, C438S240000, C427S255270, C427S255400, C427S255320
Reexamination Certificate
active
06713316
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to a method for removing foreign matter using a supercritical or subcritical medium, and more particularly relates to a method for forming a dielectric film such as a silicon dioxide film or ferroelectric film, a semiconductor device and a film deposition apparatus.
As the quantity of data processable per unit time by present-day high-performance electronic units goes on increasing, demand for large-capacity memories with a capacitive insulating film, like dynamic random access memories (DRAMs), is escalating. However, increase in area occupied by memories on a chip should be minimized to meet the downsizing requirement imposed on the electronic units of today. Thus, to realize a large-capacity memory while avoiding the increase in occupied area, capacitance per unit area of an insulating material for the capacitive insulating film should be increased to such a level that the memory does operate normally even if the area of a unit cell is reduced. For that purpose, capacitive insulating films made of ferroelectric or high-dielectric-constant materials have been applied recently.
Examples of high-dielectric-constant materials include Ba—Sr—Ti—O (BST) and Pb—Zr—Ti—O (PZT). When a high-dielectric-constant material is used, the stereoscopic configuration of a cell should be modified in some way or other to realize a DRAM with a capacity on the order of at least 1 gigabits and preferably more. For example, the area of the capacitor cell can be reduced and yet a sufficient quantity of charge can be stored in a unit area if tiny stepped portions are provided. Ferroelectric materials such as Sr—Bi—O (SBO) and Sr—Ta—Nb—O (STN) are adopted to take advantage of the spontaneous residual polarization of dielectric materials. If a ferroelectric material is used, however, resultant step coverage will be not so good. That is to say, it is usually difficult to form a ferroelectric thin film with a uniform thickness over the stepped portions.
As can be seen, no matter whether the high-dielectric-constant material or ferroelectric material is used, a technique of forming a thin film of either material over tiny stepped portions at a good coverage plays a key role to attain a desired capacity. As for the step coverage, a CVD process is superior to a sputtering technique, for example. This is why research and development has been carried on vigorously to form a film with good dielectric properties by a CVD process.
Examples of the CVD processes applicable to deposition of a BST or PZT film include a thermal CVD process and a plasma-enhanced CVD process. According to the thermal CVD process, organometallic complexes, containing the constituent metal elements of the film to be formed, are used as source materials. These organometallic complexes are dissolved in a solvent such as butyl acetate or tetrahydrofuran (THF), vaporized and then introduced into a reaction chamber, thereby causing a chemical reaction among them on a heated substrate. According to the plasma-enhanced CVD process, reaction of organometallic complexes on a substrate is accelerated by plasma generated within a reaction chamber. Also, in the thermal or plasma-enhanced CVD process, a plurality of source materials may be mixed at a predetermined ratio by various techniques. For example, according to a technique, respective solutions of organometallic complexes are mixed at the predetermined ratio and then vaporized. Another technique is vaporizing respective solutions of organometallic complexes and solvents and then mixing the resultant gases at the desired ratio. For instance, in depositing a BST film by a CVD process, three organometallic complexes Ba(DPM)
2
, Sr(DPM)
2
and Ti(O-iPr)
2
(DPM)
2
(where DPM is dipivaloylmethanato) are used as respective source materials, dissolved in a solvent such as butyl acetate at room temperature and then mixed at a predetermined weight ratio. Next, the mixture is introduced into, and vaporized by, a vaporizer that has been heated up to about 220° C. Thereafter, these three organometallic complexes vaporized are introduced into a reaction chamber, in which a substrate has been heated up to about 400° C. to about 700° C. And then these three organometallic complexes vaporized are allowed to react with each other on the substrate, thereby forming a BST film thereon.
The organometallic complexes such as these are likely to combine with each other to form a copolymer, generally speaking. Accordingly, a variation in vaporization temperature or decomposition happens easily. Thus, in many cases, the formation of such a copolymer is prevented by a steric hindrance state, which has been created through the coordination of a so-called “adduct” such as a tetraglyme group.
In recent years, a complementary MOS (CMOS) LSI including CMOS transistors has been further downsized, and a CMOS LSI with a design rule of 0.25 &mgr;m has been used practically these days. An MOS transistor is a device with four terminals, i.e., gate, source, drain and semiconductor substrate. The gate electrode and the semiconductor substrate are electrically isolated from each other due to the existence of a gate insulating film therebetween. The potential at the gate electrode changes the quantity of carriers to be induced in a region of the semiconductor substrate just under the gate insulating film (i.e., channel region) and also changes the amount of drain current flowing. Based on this principle, the current flowing between the source and drain in the MOS transistor is controllable in terms of the value and ON/OFF states thereof.
In this case, no leakage current should flow between the gate electrode and any other terminal (i.e., source, drain or semiconductor substrate) in a single MOS transistor. Accordingly, the gate insulating film is required to exhibit very high insulation properties and reliability. For example, in an MOS transistor included in a CMOS LSI with a design rule of 0.5 &mgr;m, the thickness of the gate insulating film is about 10 nm and the intensity of an electric field applied to the gate electrode during the operation of the transistor is 3 to 4 MV/cm. In this case, since the maximum rated electric field is about 8 MV/cm, the dielectric breakdown voltage of the gate insulating film should be about 10 MV/cm. Also, the gate insulating film needs to ensure good reliability for 10 years if the film is subjected to a TDDB test, for example.
To meet all of these severe requirements, a silicon dioxide film of quality has heretofore been used as gate insulating film for an MOS transistor. The silicon dioxide film is often formed by a so-called thermal oxidation process. Specifically, a silicon substrate is placed within an electric furnace and then heated up to 800 to 900° C. with oxygen or water vapor introduced into the electric furnace, thereby growing a silicon dioxide film on the silicon substrate. The silicon dioxide film grown is sometimes densified within a non-oxidizing gas such as nitrogen gas by being heated up to the maximum temperature in all the process steps to be performed before the transistor is completed. The gate insulating film ensuring very high reliability has been formed in this manner.
Parts of a transistor that should be made of an insulating film of quality are not limited to the gate insulating film. For instance, a passivation film of silicon dioxide is also required to be no less reliable than the gate insulating film is. Specifically, the gate electrode of a transistor has been made of polycrystalline silicon (poly-Si) such that source/drain regions can be self-aligned with the gate electrode. In this case, the gate electrode is formed by patterning a polysilicon film and then the SiO
2
passivation film is formed on the surface of the gate electrode to prevent leakage current from flowing between the surrounding portions of the gate electrode and the semiconductor substrate.
Furthermore, the same statement is equally applicable to various MOS devices other than an MOS transistor. For example, a capacitive insulatin
Morita Kiyoyuki
Ohtsuka Takashi
Ueda Michihito
Everhart Caridad
Luu Chuong A
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