Semiconductor device manufacturing: process – Chemical etching – Liquid phase etching
Reexamination Certificate
1998-06-04
2002-07-23
Fahmy, Jr., Wael (Department: 2823)
Semiconductor device manufacturing: process
Chemical etching
Liquid phase etching
C510S176000
Reexamination Certificate
active
06423646
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to a method for removing unwanted materials from a silicon surface and an article prepared by such method and more particularly, relates to a method for removing simultaneously from a silicon surface etch-induced polymeric films and damaged silicon layers by exposing the surface to an amine-containing solution and an article prepared by the method.
BACKGROUND OF THE INVENTION
Modem semiconductor devices are built on semi-conducting substrates such as silicon substrates that have P
+
and N
+
type doped regions in the substrates as basic elements of the device. The doped regions must be connected in a specific configuration to form a desired circuit. The circuit needs to be accessible to the outside world through conducting pads for testing and through bonding into a packaged chip. To form a semiconductor circuit, at least one layer of a conducting material such as metal must be deposited and patterned to form contacts and interconnects between the different regions of the chip. For instance, in a typical semiconductor fabrication process, a silicon wafer is first covered with an insulating layer and then, patterned and etched for contact openings in the insulating layer. A conductive material is then deposited and defined to form contact plugs and interconnecting leads.
Contact windows (or holes) to a silicon or silicide layer are usually defined and etched in an insulating layer, i.e., a dielectric material layer, by using lithographic and dry etching techniques. A dry etching technique works anisotropicallly to enable the opening of contact holes that have high aspect ratios. Once formed, contact holes can be filled with a conducting material such as a metal to form vertical connections to a first level metal. Contact holes can also be made by a wet etch process. A wet etch process is carried out by immersing a wafer in an appropriate etchant solution or by spraying the wafer with a solution. When a wet etch process is used, the etching action is isotropic in nature such that the material is etched in both the lateral and the vertical directions. Lateral etching in a wet etch process produces undercutting under a mask which is undesirable in most fabrication processes.
On the other hand, a dry etch process etches anisotropically and creates vertical sidewalls in a contact hole such that the top and the bottom of the hole have almost the same dimensions. The dry etch process is therefore more frequently used in modern sub-micron devices since it does not create undercutting problem and does not require or waste additional lateral area for a contact hole. The dry etching process further provides the benefits of reduced chemical hazard and waste treatment problems, easily achievable process automation and tool clustering. Two of the most widely used dry etching techniques are the plasma etching technique and the reactive ion etching technique.
While dry etching technique provides significant improvement in dimensional control and therefore is widely used in VLSI and ULSI fabrication technologies, it also has some limitations. One of such limitations is the formation of polymeric contaminating films which contains carbon and fluorine. The polymeric contaminating films are generally formed from a fluorocarbon gas plasma reaction as a reaction byproduct. The polymeric contaminating films are detrimental to an IC device formed on the surface of a silicon wafer and moreover, are very difficult to remove. The presence of these type of organic impurities on the wafer surface can further cause incomplete cleaning of the surface, leaving contaminants such as native oxide or metal impurities which can cause the device to fail.
Another limitation of the dry etching technique is the inevitable damage to the surface layer of the silicon substrate that is exposed in the contact hole. For instance, when a contact hole is formed on the surface of a silicon substrate, the dry etching plasma gas etches away an insulating layer such as oxide situated on top of the silicon. However, the etching reaction does not completely stop at the oxide silicon interface. This is illustrated in FIG.
1
.
FIG. 1
illustrates an enlarged, cross-sectional view of a silicon substrate having a contact hole formed therein. Silicon substrate
10
of the semiconductor structure
20
is first covered with an insulating layer of silicon dioxide
12
. A photoresist layer
14
is then deposited on top of the oxide layer
12
and patterned for a specific circuit, i.e., in the present case, for a contact hole (or window)
16
. During a dry etching process for making the contact hole
16
by removing the oxide layer in the opening, it is inevitable that the surface layer
22
of the silicon substrate is also damaged by the etching plasma gas
24
. When a fluorocarbon gas plasma is used as the dry etching gas, it has been shown that a surface layer of silicon having a thickness between about 20 Å and about 60 Å is usually damaged. The single crystalline structure of the surface silicon layer is transformed to an amorphous structure by the bombardment of the gas plasma
24
. A direct effect of the damaged silicon layer
22
is that the contact resistance at the damaged silicon site is drastically increased. The contact resistance has been observed to have increased to 20 k&OHgr;, while a contact resistance of less than 10 k&OHgr; is desirable for the application of a metal contact. The damaged silicon layer not only exhibits a high contact resistance, but also exhibits an unstable resistance value which renders the fabrication of a reliable device impossible. The removal of the etch-induced damaged silicon layer from the substrate surface is therefore highly desirable.
It has been determined that the deposition of an undesirable polymeric film on a wafer surface cannot be effectively eliminated by varying the processing parameters during a dry etching process. Since the formation of the polymeric contaminating films cannot be avoided, i.e., as long as a fluorocarbon gas plasma is utilized, an effective method for cleaning the wafer surface of such contaminating films must be provided.
Conventionally, in order to clean a wafer surface of a polymeric contaminating film and a damaged silicon layer, a combination of the dry ashing technique and the wet chemical stripping technique must be utilized. For instance, a dry ashing and wet stripping processes must be used to remove etch-induced polymeric contaminating films while a dry etching technique must be used to remove the damaged silicon layers, respectively. The special post-etch treatments must be carried out for each wafer after a dry etching process in order to eliminate the cause of high contact resistance for the contact hole and the potential contamination of the semiconductor device.
The conventional dry etching and wet stripping processes have been used in ULSI small contact hole etching processes. The dry post-etch treatment is usually a high pressure (approximately 1 Torr) downstream etching process. The process is difficult to carry out since reactive species cannot effectively diffuse through a high aspect ratio contact hole in order to remove the etch-induced damaged silicon layer at the bottom of the hole. Moreover, additional steps of dry ashing and wet chemical stripping are necessary to remove the polymeric contaminating films. The conventional process therefore requires a multiple and complex post-etching cleaning process. The dry ashing method utilized is normally a downstream oxygen dry ashing method. The wet chemical stripping method utilized is usually a H
2
SO
4
/H
2
O
2
(at a ratio of 3:1 or 4:1 and 120~130° C.) process. A dry ashing process by ozone has also been utilized in combination with a subsequent wet cleaning by H
2
SO
4
/H
2
O
2
. The wet stripping process is difficult to control since the high cleaning temperature depletes the concentration of H
2
O
2
and renders the maintenance of a consistent solution mix difficult.
It is therefore an object of the presen
Lee Hsiu-Lan
Li Pei-Wen
Yen Tzu-Shih
Fahmy Jr. Wael
Kebede Brook
Vanguard International Semiconductor Corporation
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