Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Patent
1998-04-23
2000-10-17
Ton, D.
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
370229, H04J 316
Patent
active
061342394
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a method defined in the introductory part of claim 1 for managing a buffer in a data network, in which the data is divided into frames and the frame has several cells.
2. Description of the Related Art
At the present high-speed data networks are used for the data transfer, of which an ATM-network (Asynchronous Transfer Mode)-network can be mentioned as an example. Besides high transfer speeds the most significant advantages of the ATM include a connectable and dynamic architecture. ATM can easily be adapted for different occasional telecommunication speeds. ATM- terminal devices can also reserve the desired portion of the band width of the ATM-network in order to establish connections similar to a telephone network. Due to the connection distance one of the most important factors influencing the ATM performance is the architecture of the coupling circuit in the ATM-device.
When information is transferred between two computers through private and public ATM-networks, the transmitter must negotiate with each node or node point along the way concerning the routing of the packages, transfer speeds and service levels. The process is in principle analoguous to the connection establishment in a telephone network. The most remarkable difference is the determination of the service level. The communications description defines the parameters for the average transfer speed of ATM-cells as well as the burst duration and the delay variation tolerance. It is also determined, whether the connection serves constant bit rate or variable bit rate sources and whether the question is about connectable, as frame relay, or nonconnectable communications known from the local network.
Depending on the agreed service level the nodes follow priorities, which determine, which of the willing cells is allowed firstly inside the ATM-circuit. Besides it is determined by priorities, which of the cells are removed firstly, when the transfer channel is for some reason overloaded.
An ATM-connection is established by paths (Virtual Path) formed inside a physical copper or light cable and connecting together nodes and terminal devices, which paths for their part are divided into several logical virtual channels. By paths the stationary reserved connections are realized and by channels the connectable temporary connections. Thanks to the flexible architecture each parallel channel of one path can transfer data of different type. The conception of virtuality peculiar to ATM is therefore generated by the idea, that the physical movement of a cell through the ATM coupling circuit lasts only for a while, though the connection is available all the time.
The fixed length of an ATM-cell has been chosen as 53 bytes, of which 48 bytes include actual information. In order to save space the 5-byte header of the ATM-cell does not comprise all necessary routing information, but only data of the next path (VP) and channel (VC). ATM assumes that the underlying transfer path is reliable, whereby the node points do not check the integrity of the data they transfer.
The path usually comprises several channels seeking for the transfer capacity. It is therefore obvious that in a certain stage several packages are simultaneous striving to attain the node. On the other hand the dynamically varying transfer speed may cause in the case of burst-filled communications situations, in which the optimal transfer speed of the node point is exceeded. Inner blocking takes place in the circuit itself for example in the case, when two data packages going to different out-ports are obliged to use the same inner route. If the circuit is not able to adapt two cells simultaneously to the same route, the other cell must be buffered or even destroyed. Upon the delivery blocking two cells are competing for the same out-port. By placing the buffer to the out-port, part of the problems is avoided. The buffer may operate either by the FIFO- line principle or according to priorities, whereby the time-dependin
REFERENCES:
patent: 5153877 (1992-10-01), Esaki et al.
patent: 5737314 (1998-04-01), Hatono et al.
patent: 5923627 (1999-07-01), Miwa et al.
Heinanen Juha
Kilkki Kalevi
Sonera OY
Ton D.
LandOfFree
Method for rejecting cells at an overloaded node buffer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for rejecting cells at an overloaded node buffer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for rejecting cells at an overloaded node buffer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-476439