Method for reducing the bandwidth requirement in a system includ

Details Method for reducing the bandwidth requirement in a system includ Method for reducing the bandwidth requirement in a system includ

1995-12-14

1998-07-21

Voeltz, Emanuel Todd

Coded data generation or conversion

Digital code to digital code converters

Tree structure

341 60, 36471502, 370477, 370521, 382232, G06F 700

Patent

active

057845719

ABSTRACT:
In a video system having an encoder and multiple decoders, a snooping circuit in each decoder compares an address on a common data bus to determine whether encoded video data is read or written by a host computer. When the address on the common data bus is detected to be an address within a predetermined range, the read or write data on the common data bus is latched into a first-in-first-out (FIFO) memory. A decoding circuit in each decoder decodes from the FIFO memory to provide a decoded video data output stream. In this manner, multiple decoders can be supported by the video system without additional bandwidth demand on the host computer.

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patent: 5351129 (1994-09-01), Lai
patent: 5369617 (1994-11-01), Munson
patent: 5488695 (1996-01-01), Cutter
patent: 5586264 (1996-12-01), Belknap et al.
patent: 5598222 (1997-01-01), Lane
patent: 5603058 (1997-02-01), Belknap et al.

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