Patent
1997-05-30
1999-05-25
Lee, Thomas C.
395383, 395842, G06F 946
Patent
active
059077123
ABSTRACT:
A method and apparatus are provided for reducing processor interrupt processing time in a data processing system. The data processing system includes a system processor, a system memory and an adapter coupled to the system processor and the system memory. The adapter checks for an interrupt condition. Responsive to identifying an interrupt condition, the adapter transfers predetermined interrupt status information to the system memory. Then the adapter raises an interrupt to the system processor. The adapter uses a direct memory access (DMA) descriptor or a source address and a destination address to move the predetermined interrupt status information to the system memory.
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International Business Machines - Corporation
Kim Harold J.
Lee Thomas C.
Pennington Joan
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