Method for reducing power consumed by a static microprocessor

Details Method for reducing power consumed by a static microprocessor Method for reducing power consumed by a static microprocessor

1979-08-09

1988-07-19

Eng, David Y.

Boots, shoes, and leggings

G06F 104

Patent

active

047589450

ABSTRACT:
In response to a software instruction, a static microprocessor is placed in a low current mode by disabling clock pulse generation. Means are provided for disabling a master oscillator when a STOP instruction is decoded. Additional means are provided for inhibiting clock pulses when a WAIT instruction is decoded without disabling the master oscillator. Clock pulse generation is again enabled upon receipt of a reset or interrupt signal.

REFERENCES:
patent: 3411147 (1968-11-01), Packard
patent: 3535560 (1970-10-01), Cliff
patent: 3736569 (1973-05-01), Bouricius et al.
patent: 3855577 (1974-12-01), Vandierendonck
patent: 3941989 (1976-03-01), McLaughlin et al.
patent: 4030079 (1977-06-01), Bennett et al.
patent: 4151611 (1979-04-01), Sugawara et al.
patent: 4158230 (1979-06-01), Washizuka et al.
patent: 4191998 (1980-03-01), Carmody

Affiliated with

Also associated with

Rating

Method for reducing power consumed by a static microprocessor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for reducing power consumed by a static microprocessor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for reducing power consumed by a static microprocessor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-601032