Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
2005-05-31
2005-05-31
Arbes, Carl J. (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
84
Reexamination Certificate
active
06898844
ABSTRACT:
A method is provided for designing a printed circuit board. This may include analyzing at least one characteristic of a first plurality of relatively parallel conductive paths on the printed circuit board. The first plurality of relatively parallel conductive paths may be arranged in a pattern in a first area of the printed circuit board. The method may also include rearranging the pattern of conductive paths such that a second plurality of relatively parallel conductive paths in a second area of the printed circuit board have a different geometry or arrangement with respect to one another as compared to a geometry or arrangement of the first plurality of relatively parallel conductive paths in the first area.
REFERENCES:
patent: 04-079354 (1992-03-01), None
patent: 04-290297 (1992-10-01), None
patent: 04-313300 (1992-11-01), None
patent: 07-245575 (1995-09-01), None
patent: 2000-244133 (2000-09-01), None
The Development of a SPICE Model to Predict the Crosstalk Reduction of Coupled Lines, by D.N. Ladd et al Symposium on Antenna Technology and Applied Electromahnetics 1990 Conference Proc. First Ed. p. 761-5 1990.
Arbes Carl J.
Kenyon & Kenyon
LandOfFree
Method for reducing multiline effects on a printed circuit... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for reducing multiline effects on a printed circuit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for reducing multiline effects on a printed circuit... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3454408