Method for reducing lateral dopant diffusion

Fishing – trapping – and vermin destroying

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437241, 437952, H01L 21302

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active

055061699

ABSTRACT:
A process is disclosed for inhibiting lateral diffusion of dopants in a semiconductive material. At least one conductivity dependent region is formed in the semiconductor, and a blocking layer is provided in overlying relation with the conductivity dependent region. Interstitial sites or vacancies are introduced into the conductivity dependent region in accordance with the diffusion mechanism of a selected dopant, and dopant is diffused into the semiconductor in a direction that is substantially transverse to the semiconductor upper surface while inhibiting with the introduced interstitial sites or vacanies lateral diffusion of the dopant into the conductivity dependent region.

REFERENCES:
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patent: 5286672 (1994-02-01), Hodges et al.
patent: 5374584 (1994-12-01), Lee et al.
Ghandhi, "VLSI Fabrication Principles, Silicon & Gallium Arsenide", 1983, pp. 420-424, 427-429.
Ahn, S. T., et al., Reduction of Lateral Phosphorus Diffusion in CMOS n-Wells, IEEE Transactions on Electron Devices, vol. 37 No. 3, Mar. 1990, pp. 806-807.
Wong, S. S. and Ekstedt, T. W., CMOS Well Drive-In in NH.sub.3 for Reduced Lateral Diffusion and Heat Cycle, IEEE Electron Device Letters, vol. EDL-6, No. 12, Dec. 1985, pp. 659-661.
Ahn, S. T., et al., Film stress-related vacancy supersaturation in silicon under low-pressure chemical vapor deposited silicon nitride films, J. Appl. Phys. 64(10), Nov. 1988, pp. 4914-4919.

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