Method for reducing errors in switched-capacitor digital-to-anal

Details Method for reducing errors in switched-capacitor digital-to-anal Method for reducing errors in switched-capacitor digital-to-anal

1995-01-24

1995-09-19

Williams, Howard L.

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

341143, 341172, H03M 166

Patent

active

054519500

ABSTRACT:
A switched-capacitor DAC system includes two switched-capacitor DACs and a load circuit. The switched-capacitor filter of the first DAC samples a reference voltage source, which produces a reference voltage, at a first rate and the switched-capacitor filter of the second DAC samples the reference voltage source at a second rate, greater than the first rate. The load circuit samples the reference voltage source at a rate such that the level of the reference voltage is the same each time a sample is taken. The load circuit effectively equates the sampling of the two filters and substantially eliminates problems related to gain errors and low frequency quantization noise.

REFERENCES:
patent: 5248970 (1993-05-01), Sooch et al.
patent: 5323158 (1994-06-01), Ferguson, Jr.

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