Method for reducing defects in a semiconductor lithographic proc

Radiation imagery chemistry: process – composition – or product th – Including control feature responsive to a test or measurement

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382149, G03F 900

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active

059854979

ABSTRACT:
An arrangement for optimizing a lithographic process forms a pattern on a silicon wafer using a photocluster cell system to simulate an actual processing condition for a semiconductor product. The resist pattern is then inspected using a wafer inspection system. An in-line low voltage scanning electron microscope (SEM) system reviews and classifies defect types, enabling generation of an alternative processing specification. The alternative processing specification can then be tested by forming patterns on different wafers, and then performing split-series testing to analyze the patterns on the different wafers for comparison with the existing lithographic process and qualification for production.

REFERENCES:
patent: 5736281 (1998-04-01), Watson
patent: 5817445 (1998-10-01), Bae
patent: 5871874 (1999-02-01), Tounai

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