Method for reducing capacitance depletion during hemispherical g

Details Method for reducing capacitance depletion during hemispherical g Method for reducing capacitance depletion during hemispherical g

1999-04-07

2000-12-19

Mills, Gregory

Semiconductor device manufacturing: process

Chemical etching

Altering etchability of substrate region by compositional or...

438255, 438398, 438964, 438719, H01L 21302

Patent

active

061627321

ABSTRACT:
A method of forming hemispherical grain (HSG) silicon is disclosed. The method comprises the steps of: forming a doped amorphous silicon layer on a substrate; seeding and annealing the amorphous silicon layer until HSG silicon is formed; enlarging the HSG silicon grains during the annealing stage; and performing a chemical dry etch on the HSG silicon to remove an undoped silicon layer from the surface of the HSG silicon.

REFERENCES:
patent: 5658381 (1997-08-01), Thakur et al.
patent: 5885869 (1999-03-01), Turner et al.
patent: 5886375 (1999-03-01), Sun
patent: 5933727 (1999-08-01), Figura
patent: 5937314 (1999-08-01), Ping et al.
patent: 5963804 (1999-10-01), Figura et al.
patent: 6004859 (1999-12-01), Lin

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