Method for recrystallizing an amorphized silicon germanium...

Single-crystal – oriented-crystal – and epitaxy growth processes; – Processes of growth with a subsequent step of heat treating...

Reexamination Certificate

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Reexamination Certificate

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06793731

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention generally relates to semiconductor fabrication and, more particularly, to a relaxed recrystallized silicon germanium film and method for amorphizing and recrystallizing to form a low defect density relaxed silicon germanium film on a silicon substrate.
2. Description of the Related Art
It is desirably to build transistors and integrated circuits using silicon germanium, as the silicon germanium layers have a higher electron and hole mobility than silicon. As a result, high drain drive current MOS transistors can be fabricated if the transistor active regions are formed over silicon germanium layers. Although the lattice structure of silicon and silicon germanium are similar, in the 110 orientation for example, lattice mismatch is a critical issue when silicon germanium (SiGe) is formed over silicon (Si).
SiGe can be grown over an underlying Si substrate so that the lattice structures of the two materials match. However, the tensile strained SiGe layer is not stable. It is well known that when SiGe is grown onto a silicon substrate, known as pseudomorphic growth, the SiGe layer is strained due to its larger than Si lattice size. There is a high density of defects at the Si to SiGe interface due to the mismatch of the lattice size. During subsequent fabrication steps, such as annealing, even more defects can occur the SiGe boundary with the Si and propagate upwards in the surface of the film. These defects degrade electron and hole mobility across the resultant device.
One approach to the problem has been to deposit a graded layer of SiGe where the content of the Ge varies. This composite film is designated herein as Si
1−x
Ge
x
. The layer of Si
1−x
Ge
x
film near the underlying Si substrate interface can be made with a low Ge content for lattice matching. For thinner, fully strained Si
1−x
Ge
x
films (with low Ge content), the top thin layer may have a low defect density, and the top surface can be very smooth. As the Ge content is increased, by either increasing film thickness or by increasing Ge density in the Si
1−x
Ge
x
film, the strain in the Si
1−x
Ge
x
is relieved by the generation of misfit dislocations at the Si
1−x
Ge
x
/Si interface. These misfit dislocations are accompanied by a high density of threading dislocations. Many of the threading dislocations extend to the surface of the Si
1−x
Ge
x
epilayer.
It is known to use a thick layer of relaxed graded Si
1−x
Ge
x
, followed by another thick layer of buffered Si
1−x
Ge
x
layer, and a silicon cap to fabricate high drain drive current MOS transistors. The total thickness is in the order of several microns and the defect density is still in the order of 1×10
5
/cm
2
. The thick Si
1−x
Ge
x
layer and the high defect density of this conventional Si
1−x
Ge
x
process make it unusable for large-scale integrated circuit fabrication.
It is known that strain relaxed high quality Si
1−x
Ge
x
layers on Si can be obtained by hydrogen ion implantation and annealing. Hydrogen ion implantation forms a narrow defect band slightly below the SiGe/Si interface. During subsequent annealing, hydrogen platelets and cavities form, giving rise to strong enhanced strain relaxation in the Si
1−x
Ge
x
epilayer. Hydrogen ions also terminate the threading dislocations, preventing the threading dislocations from propagating toward the Si
1−x
Ge
x
surface. However, hydrogen ion implantation/annealing alone is unable to reduce the defects to an acceptable density when SiGe films having a thickness of 250 nanometers (nm) to 400 nm are fabricated for very large scale integration (VLSI) applications.
It would be advantageous if thicker SiGe films could be fabricated, without defects, overlying silicon substrates.
It would be advantageous if the hydrogen ion implantation concept could be refined for reducing the number of defects along the interface between a Si substrate and an overlying SiGe film.
SUMMARY OF THE INVENTION
The present invention provides an amorphization process, followed by a recrystallization of Si
1−x
Ge
x
film in conjunction with hydrogen ion implantation, for the minimization of defect density in the Si
1−x
Ge
x
epilayer. This process produces a low defect density when forming 250 nm to 500 nm thick films of relaxed Si
1−x
Ge
x
films, with a Ge content of up 30% to 50% at the top surface. The low defect densities, film thicknesses, and high Ge content support large-scale integrated circuit applications.
Accordingly, a method is provided for forming a single-crystal silicon germanium film on a silicon substrate. The method comprises: providing a silicon substrate with a top surface; growing a graded layer of strained single-crystal Si
1−x
Ge
x
having a bottom surface overlying the Si substrate top surface and a top surface, where x increases with the Si
1−x
Ge
x
layer thickness in the range between 0.03 and 0.5, and the thickness of the Si
1−x
Ge
x
layer is in the range of 2500 to 5000 Å; implanting hydrogen ions; penetrating the Si substrate with the hydrogen ions a depth in the range of 300 to 1000 Å; implanting heavy ions, such as Si or Ge, into the Si
1−x
Ge
x
; in response to the heavy ion implantation, amorphizing a first region of the Si
1−x
Ge
x
layer adjacent the Si substrate; annealing; in response to the annealing, forming a hydrogen platelets layer between the Si substrate and the Si
1−x
Ge
x
layer; forming a silicon layer with a high density of hydrogen underlying the hydrogen platelets layer; and, forming a relaxed single-crystal Si
1−x
Ge
x
region, free of defects.
Additional details of the above-described method, and a film structure with a relaxed layer of graded silicon germanium overlying a silicon substrate, are provided below.


REFERENCES:
patent: 4819037 (1989-04-01), Sakakibara et al.
patent: 5084411 (1992-01-01), Laderman et al.
patent: 5256550 (1993-10-01), Laderman et al.
patent: 5633174 (1997-05-01), Li
patent: 5726440 (1998-03-01), Kalkhoran et al.
patent: 5735949 (1998-04-01), Mantl et al.
patent: 5920764 (1999-07-01), Hanson et al.
patent: 6211095 (2001-04-01), Chen et al.
patent: 6313016 (2001-11-01), Kibbel et al.
patent: 6464780 (2002-10-01), Mantl et al.
patent: 6562703 (2003-05-01), Maa et al.
patent: 6573126 (2003-06-01), Cheng et al.
patent: 2003/0107032 (2003-06-01), Yoshida
patent: 2003/0215990 (2003-11-01), Fitzgerald et al.
S. Mantl, B. Hollander, R. Liedtke, S. Mesters, H. J. Herzog, H. Kibbel, T. Hackbarth, “Strain relaxation of epitaxial SiGe layer on Si (100) improved by hydrogen implantation”, Nuclear Instruments and Methods in Physics Research B 147 (1999) P.29-34.
T. Nakato, “Method for Forming GeSi Si SiO2Heterostructure Using Ge Implant” US patent # 5,792,679, Issued Aug. 11 1998.
S. T. Hsu and T. Nakato, “Ge-Si SOI MOS Transistor and Method of Fabricating Same” US patent #5,726,459, Issued Mar. 10 1998.

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