Multiplex communications – Communication techniques for information carried in plural... – Combining or distributing information via time channels
Reexamination Certificate
2000-06-01
2004-04-06
Pham, Chi (Department: 2663)
Multiplex communications
Communication techniques for information carried in plural...
Combining or distributing information via time channels
C370S395700
Reexamination Certificate
active
06717960
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of digital communication, and, more particularly, digital communication over a network using inverse multiplexed asynchronous transfer mode protocol.
BACKGROUND OF THE INVENTION
Communications networks, such as wide area networks (WANs) allow for the transfer of digital data from numerous sources through shared or common communication links. The standard network communication links in use in the United States are the T
1
and T
3
links. In Europe, E
1
and E
3
links are the standard and they roughly correspond in size to the T
1
and T
3
links, respectively. The T
1
/E
1
link provides a relatively slow maximum data rate transfer compared to that of the T
3
/E
3
link, but the T
1
/E
1
link is also much less expensive.
Until recent years, businesses whose networks required more capacity than a single T
1
/E
1
link, but less than that of a T
3
/E
3
link were faced with a problem. They either had to make do with the insufficient capacity of the T
1
/E
1
link, purchase a more expensive T
3
/E
3
link which would be underutilized, or attempt to use incremental T
1
/E
1
circuits to provide an intermediate capacity between the two. While the later option provided the best balance between cost and capacity, it also came with a loss in ability to aggregate and manage traffic across the communication links.
One technology which has been developed to address this problem is the asynchronous transfer mode (ATM) network which allows for enhanced control of data over multiple communication lines, such as T
1
/E
1
lines. Recently, the ATM Forum Technical Committee developed a set of universal standards or protocol for performing inverse multiplexing over ATM (IMA) networks entitled “Inverse Multiplexing for ATM (IMA) Specification,” Version 1.1, March 1999 (the “IMA Specification”), which is hereby incorporated herein by reference in its entirety. IMA allows an aggregate stream of ATM cells to be divided at a transmitting end of a network across multiple connection links on a cell-by-cell basis and then reassembled into the aggregate stream at a receiving end of the network without losing the original ATM cell order.
One problem that the IMA Specification seeks to address is the fact that differences in the link delays from one link to another cause the ATM cells to arrive out of order at the receiving end. Delay compensation must be performed based upon the various delays across the links so that synchronization of the ATM cells can be restored. The IMA Specification provides a sample approach for performing this link differential delay (LDD) compensation. This approach was intended as a guide and does not address many of the practical problems encountered when implementing an IMA system. For example, the sample approach does not provide a way for aligning and starting the pointers of the delay compensation buffers used in reconstructing the aggregate cell stream on the receiving end. Furthermore, the cells are transmitted in frames, and if the first IMA control protocol (ICP) cell received on a link is missing or corrupted, the LDD computation will be in error by a frame for that link.
An alternative approach to that of the IMA Specification for performing the LDD compensation is found in U.S. Pat. No. 6,002,670 to Rahman et al. entitled “Optimization and Recovery Techniques in IMA Networks.” The patent discloses calculating a LDD for each communication link based upon the shortest link delay among all of the communication links. This and other prior art approaches do not provide a way to overcome the above problems, however.
SUMMARY OF THE INVENTION
In view of the foregoing background, it is therefore an object of the invention to provide a method and device for reconstructing an aggregate stream of cells transmitted using ATM protocol that provides a relatively simple way to align the pointers of the delay compensation buffers used to reconstruct the cell stream.
It is another object of the invention to provide such a method and device that requires smaller delay compensation buffers than in the prior art.
It is still another object of the invention to provide such a method and device that reduces errant link differential delay calculations caused by missing or corrupted ICP cells.
These and other objects, features, and advantages in accordance with the present invention are provided by a method for reconstructing an aggregate stream of cells transmitted over a plurality of communication links in an ATM protocol. The method includes determining a respective link delay for each of the communication links, including determining a fastest communication link; and determining a common starting cell at which the cells from the communication links will correspond in time and based upon the fastest communication link. The method also includes filling a respective delay compensation buffer with corresponding cells for each of the communication links beginning with the common starting cell and reading the cells from the delay compensation buffers in a round-robin fashion to reconstruct the aggregate stream of cells. By using the common starting cell, the read pointers of the delay compensation buffers may easily be aligned for round-robin reading, thus avoiding a complicated on-the-fly adjustment of the read pointers and reducing the possibility of errors during reading.
The method may further include comparing each link delay to the link delay for the fastest communication link to determine a delay difference therebetween and generating a signal responsive thereto if the difference is greater than a threshold. The threshold may be about 300 milliseconds. The delay compensation buffers correspond in size to a number of cells that can be written within the threshold. For example, for a threshold of 25 milliseconds on a T
1
link the number of cells would be 91 cells. The communication links may be T
1
or E
1
links.
Each cell that is transmitted has a cell offset value and a frame value associated therewith. The respective link delays may be determined by using the cell offset value and the frame value to establish a number of cells received since the transmission began. Furthermore, the common starting cell may be determined by determining a current cell offset value and a current frame value for each of the communication links, preferably within a one cell period. Then, a current cell offset value and a current frame value of the fastest communication link may be compared to a respective current cell offset value and a current frame value for each of the other communication links.
The filling may include setting a respective write pointer of each delay compensation buffer to a location of the common starting cell. By beginning the writing with the common starting cell, the size of the delay compensation buffers need only be large enough to accommodate a number of cells that can be written within the threshold, resulting in smaller buffers than are required in prior art devices. The reading may include setting a respective read pointer of each delay compensation buffer to a location of the common starting cell to begin the round-robin reading. The reading preferably begins once the delay compensation buffer for the slowest communication link has begun filling.
A device for reconstructing an aggregate stream of cells transmitted over a plurality of communication links in an ATM protocol according to the present invention includes a respective delay compensation buffer for each communication link and a processor. The processor determines a respective link delay for each of the communication links, including a fastest communication link. The processor also determines a common starting cell at which the cells from the communication links will correspond in time and based upon the fastest communication link. Furthermore, the processor fills each delay compensation buffer with corresponding cells for each of the communication links beginning with the common starting cell.
REFERENCES:
patent: 5608733 (1997-03-01), Vallee et a
Anesko Alexander
Brinthaupt Douglas M.
Gerveshi Christine Mary
Ramachandran Ramasubramaniam
Takla Mourad Bushra
Agere Systems Inc.
Bollman William H.
Ferris Derrick W
Pham Chi
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