Pulse or digital communications – Receivers – Interference or noise reduction
Reexamination Certificate
2008-04-22
2009-12-29
Ha, Dac V (Department: 2611)
Pulse or digital communications
Receivers
Interference or noise reduction
C375S269000, C375S278000, C375S334000, C375S350000, C708S300000, C455S043000, C455S214000, C455S227000, C455S296000, C455S318000
Reexamination Certificate
active
07639762
ABSTRACT:
A receiver architecture for receiving an FSK signal having a predetermined number of modulation levels includes a selectivity filter (206) for selectively passing a wanted channel and rejecting unwanted channels. The selectivity filter has a filter bandwidth of about one-half the bandwidth of a pre-modulation filter in a transmitter sending the FSK signal. A discriminator (208) is coupled to the selectivity filter for demodulating the signal. A symbol recovery processor (210) is coupled to the discriminator for recovering the symbols through a maximum likelihood sequence estimation (MLSE) technique utilizing N states for each symbol time, wherein N equals the predetermined number of modulation levels, and wherein templates used in the MLSE for symbol transitions are optimized with a bandwidth substantially less than the bandwidth of the pre-modulation filter.
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Dolezal David G.
Freescale Semiconductor Inc.
Ha Dac V
King Robert L.
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