Method for reading and programming a charge-trap memory...

Details Method for reading and programming a charge-trap memory... Method for reading and programming a charge-trap memory...

2008-08-21

2011-10-04

Tran, Andrew Q (Department: 2824)

Static information storage and retrieval

Floating gate

Disturbance control

C365S185030, C365S185220, C365S185200, C365S185180

Reexamination Certificate

active

08031520

ABSTRACT:
A method for programming a memory is provided. The memory includes a number of cells and has a preset PV level for a target cell. The method includes programming a first-side of the target cell to have a Vt level not lower than the preset PV level; reading a Vt level of a second-side of the target cell and accordingly obtaining a corrected PV level corresponding to the first-side; and programming the first-side of the target cell to have a Vt level not lower than the corresponding corrected PV level.

REFERENCES:
patent: 7157773 (2007-01-01), Kato et al.
patent: 7411833 (2008-08-01), Chu et al.
patent: 2006/0104113 (2006-05-01), Hsieh et al.
patent: 2011/0075473 (2011-03-01), Park et al.

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