Method for reading a nonvolatile memory device and...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185190, C365S042000, C365S185200

Reexamination Certificate

active

07054197

ABSTRACT:
A reading method for a nonvolatile memory device, wherein the gate terminals of the array memory cell and of the reference memory cell are supplied with a same reading voltage having a ramp-like pattern, so as to modify their current-conduction states in successive times, and the contents of the array memory cell are determined on the basis of the modification order of the current-conduction states of the array memory cell and of the reference memory cell.

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European Search Report from French Patent Application 03425224.7, filed Apr. 10, 2003.
Amin A A M: “Design And Analysis Of A High-Speed Sense Amplifier For Single-Transistor Nonvolatile Memory Cells” IEE Proceedings G. Electronic Circuits & Systems, Institution of Electrical Engineers. Stevenage, GB, vol. 140, No. 2 Part G, Apr. 1, 1993, pp. 117-122.

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