Method for qualifying biased burn-in integrated circuits on a wa

Details Method for qualifying biased burn-in integrated circuits on a wa Method for qualifying biased burn-in integrated circuits on a wa

1979-12-21

1981-08-04

Peters, Jimmy C.

Metal working

Method of mechanical manufacture

Electrical device making

324 52, 324158R, G01R 3102

Patent

active

042814499

ABSTRACT:
Integrated circuits in dice on a wafer are biased burn-in qualified by providing two sets of conductors connected to each die by fusible elements, biasing the dice using said conductors during the high temperature burn-in, testing the fusible elements, removing the conductors, and testing the circuits.

REFERENCES:
patent: 3303400 (1967-02-01), Allison
patent: 3493481 (1970-02-01), Messner
patent: 3634930 (1972-01-01), Cranston
patent: 3656058 (1972-04-01), Leathers
patent: 3710251 (1973-01-01), Hagge
patent: 3755888 (1973-09-01), Geil
patent: 3803483 (1974-04-01), McMahon

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